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Embedded G-Series T56N - AMD
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Embedded G-Series T56N
General Info
DesignerAMD
ManufacturerTSMC
Model NumberT56N
Part NumberGET56NGBB22GVE
MarketEmbedded
IntroductionJanuary 19, 2011 (launched)
End-of-life2021-Q2 (last order)
2021-Q4 (last shipment)
ShopAmazon
General Specs
FamilyEmbedded G-Series
SeriesG-Series APU/CPU
Frequency1,650 MHz
Turbo Frequency1,815 MHz
Clock multiplier16.5
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureBobcat
Core NameeBrazos
Core Family20
Process40 nm
Transistors451,000,000
TechnologyCMOS
Die75 mm²
Word Size64 bit
Cores2
Threads2
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP18 W
Tjunction0 °C – 90 °C
Packaging
PackageFT1, UOB413 (FC-OBGA)
Dimension19 mm × 19 mm × 1.92 mm
Pitch0.8 mm
Contacts413

T56N is a 64-bit dual-core x86 embedded microprocessor introduced by AMD in early 2011. This processor is a member of the AMD Embedded G-Series formerly codenamed "eBrazos" with CPU cores based on the Bobcat microarchitecture and is fabricated on a TSMC 40 nm process. The T56N operates at a base frequency of 1.65 GHz and a boost frequency of up to 1.815 GHz with a TDP of 18 W. It supports single-channel DDR3-1333 memory and integrates a Radeon HD 6320 GPU operating at up to 500 MHz.

Cache[edit]

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2 × 32 KiB2-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
2 × 32 KiB8-way set associativewrite-back

L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  2 × 512 KiB16-way set associative 

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3-1333
Supports ECCNo
Controllers1
Channels1
Max Bandwidth10.67 GB/s
9.937 GiB/s
10,175.705 MiB/s
10,670 MB/s
0.0097 TiB/s
0.0107 TB/s

Expansions[edit]

"eBrazos" processors integrate one 5-port, 8-lane PCIe Gen 1/2 (5 GT/s) controller. Four GPP lanes are configurable as up to four x4/x2/x1 wide (e.g. 1x2 + 2x1) links, the remaining four lanes are reserved for a UMI link to the chipset. The recommended AMD A50M "Hudson-M1" and A55E "Hudson-E1" controller hubs provide four PCIe Gen 1/2 lanes configurable as up to four x4/x2/x1 links, a 32-bit, 33 MHz PCI interface (A55E only), 6 × SATA Gen 1/2/3 (6 Gb/s), 14 × USB 1.1/2.0, 2 × USB 1.1, a Gb Ethernet MAC (A55E), HDA, LPC, SPI, SMBus, GPIO.

[Edit/Modify Expansions Info]

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Expansion Options
PCIeRevision: 2.0
Max Lanes: 4
Configuration: 1x4/2x2/1x2+2x1/4x1


Graphics[edit]

This processor integrates an AMD Radeon GPU of the Evergreen series with two compute units based on the TeraScale 2 microarchitecture. It features 80 stream processing units, 8 texture units, 16 Z/Stencil ROP units, and four color ROP units. Decoding of H.264, VC-1, MPEG-2, and DivX/Xvid video streams is accelerated by a UVD 3 engine. Two independent display controllers natively support the DisplayPort 1.1a protocol on two 4-lane DDIs, a Flat Panel Display (LVDS) link on the first port, and a VGA interface with 30 bpp color depth and up to 400 MHz pixel clock. The eDP, DVI, and HDMI protocols are supported with additional components. The maximum display resolution is 2560 × 1600 at 60 Hz, and 1920 × 1200 for the second display, limited by the available memory bandwidth.

[Edit/Modify IGP Info]

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Integrated Graphics Information
GPURadeon HD 6320
DesignerAMD
Execution Units2Max Displays2
Unified Shaders80TMUs8
ROPs4
Frequency500 MHz
0.5 GHz
500,000 KHz
Max Resolution2560 × 1600
OutputDP, eDP, HDMI, VGA, DVI, LVDS

Max Resolution
HDMI1920 × 1080 @60 Hz
DVI1920 × 1200 @60 Hz
DP2560 × 1600 @60 Hz
eDP2048 × 1536
VGA2560 × 1600
LVDS1440 × 900 @60 Hz

Standards
DirectX11
OpenGL4.0
OpenCL1.1
DP1.1a

Features[edit]

Bibliography[edit]

Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Embedded G-Series T56N - AMD#pcie +
base frequency1,650 MHz (1.65 GHz, 1,650,000 kHz) +
clock multiplier16.5 +
core count2 +
core family20 +
core nameeBrazos +
designerAMD +
die area75 mm² (0.116 in², 0.75 cm², 75,000,000 µm²) +
familyEmbedded G-Series +
first launchedJanuary 19, 2011 +
full page nameamd/embedded/t56n +
has amd amd-v technologytrue +
has ecc memory supportfalse +
instance ofmicroprocessor +
integrated gpuRadeon HD 6320 +
integrated gpu base frequency500 MHz (0.5 GHz, 500,000 KHz) +
integrated gpu designerAMD +
integrated gpu execution units2 +
isax86-64 +
isa familyx86 +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description2-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
ldateJanuary 19, 2011 +
manufacturerTSMC +
market segmentEmbedded +
max cpu count1 +
max junction temperature363.15 K (90 °C, 194 °F, 653.67 °R) +
max memory bandwidth9.937 GiB/s (10,175.705 MiB/s, 10.67 GB/s, 10,670 MB/s, 0.0097 TiB/s, 0.0107 TB/s) +
max memory channels1 +
microarchitectureBobcat +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
model numberT56N +
nameEmbedded G-Series T56N +
packageFT1 + and UOB413 +
part numberGET56NGBB22GVE +
process40 nm (0.04 μm, 4.0e-5 mm) +
seriesG-Series APU/CPU +
smp max ways1 +
supported memory typeDDR3-1333 +
tdp18 W (18,000 mW, 0.0241 hp, 0.018 kW) +
technologyCMOS +
thread count2 +
transistor count451,000,000 +
turbo frequency1,815 MHz (1.815 GHz, 1,815,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +