From WikiChip
Am2012 - Ambric
< ambric‎ | am2000

Edit Values
Am2012
General Info
DesignerAmbric
Model NumberAm2012
Part NumberAm2012
MarketEmbedded
IntroductionOctober 10, 2006 (announced)
January 2007 (launched)
End-of-life2012 (last order)
2012 (last shipment)
General Specs
FamilyAm2000
SeriesGen 1
LockedNo
Frequency333 MHz
Bus speed100 MHz
Clock multiplier3.3
Microarchitecture
MicroarchitectureAmbric
Process130 nm
TechnologyCMOS
Word Size32 bit
Cores96
Max Memory4 GiB

Am2012 was an MPPA introduced in late 2006 by Ambric. This model was made of 12 Brics arranged as a grid, making up a total of 96 32-bit RICS-like cores operating asynchronously at 1-333 MHz.

Architecture[edit]

Main article: Am2000 § Architecture

The Am2012 is made of 12 homogeneous 'Brics' laid out in a grid to form 96 cores and 96 RAM units.

General layout:

  • 12x Brics

Cache[edit]

The Am2012 contains 12 Brics, each with its own RAM Unit (RU) of 13 kB of SRAM for a total of 156 kB of SRAM.

Memory controller[edit]

Integrated Memory Controller
Type DDR2-400
Controllers 2
Channels 1
Max memory 4 GiB

Expansions[edit]

  • PCIe
  • JTAG
  • GPIO @ 100 MHz
  • serial flash
Facts about "Am2012 - Ambric"
base frequency333 MHz (0.333 GHz, 333,000 kHz) +
bus speed100 MHz (0.1 GHz, 100,000 kHz) +
clock multiplier3.3 +
core count96 +
designerAmbric +
familyAm2000 +
first announcedOctober 10, 2006 +
first launchedJanuary 2007 +
full page nameambric/am2000/am2012 +
has featurePCIe +, JTAG +, GPIO + and serial flash +
has locked clock multiplierfalse +
instance ofmicroprocessor +
last order2012 +
last shipment2012 +
ldateJanuary 2007 +
market segmentEmbedded +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
microarchitectureAmbric +
model numberAm2012 +
nameAm2012 +
part numberAm2012 +
process130 nm (0.13 μm, 1.3e-4 mm) +
seriesGen 1 +
technologyCMOS +
word size32 bit (4 octets, 8 nibbles) +