Edit Values
Xeon Silver 4208
General Info
Designer	Intel
Manufacturer	Intel
Model Number	4208
Part Number	CD8069503956401, BX806954208
S-Spec	SRFBM QPJG (QS)
Market	Server
Introduction	April 2, 2019 (announced) April 2, 2019 (launched)
Release Price	$417.00 (tray) $428.00 (box)
Shop	Amazon
General Specs
Family	Xeon Silver
Series	4200
Locked	Yes
Frequency	2,100 MHz
Turbo Frequency	3,200 MHz (1 core)
Clock multiplier	21
Microarchitecture
ISA	x86-64 (x86)
Microarchitecture	Cascade Lake
Platform	Purley
Chipset	Lewisburg
Core Name	Cascade Lake SP
Core Family	6
Core Stepping	R0, R1
Process	14 nm
Technology	CMOS
Word Size	64 bit
Cores	8
Threads	16
Max Memory	1 TiB
Multiprocessing
Max SMP	2-Way (Multiprocessor)
Interconnect	UPI
Interconnect Links	2
Interconnect Rate	9.6 GT/s
Electrical
TDP	85 W
Tcase	0 °C – 78 °C
Packaging
Package	FCLGA-3647 (FCLGA)
Dimension	76.16 mm × 56.6 mm
Pitch	0.8585 mm × 0.9906 mm
Contacts	3647
Socket	Socket P, LGA-3647
Succession
Xeon Silver 4108

Xeon Silver 4208 is a 64-bit octa-core x86 mid-range performance server microprocessor introduced by Intel in early 2019. The Silver 4208 is based on the Cascade Lake microarchitecture and is manufactured on a 14 nm process. This chip supports dual-way multiprocessing, sports one AVX-512 FMA units as well as two UPI links. This microprocessor supports up 1 TiB of hexa-channel DDR4-2400 memory, operates at 2.1 GHz with a TDP of 85 W and features a turbo boost frequency of up to 3.2 GHz.

Cache

Main article: Cascade Lake § Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 512 KiB 524,288 B 0.5 MiB L1I$ 256 KiB 262,144 B 0.25 MiB 8x32 KiB 8-way set associative   L1D$ 256 KiB 262,144 B 0.25 MiB 8x32 KiB 8-way set associative write-back L2$ 8 MiB 8,192 KiB 8,388,608 B 0.00781 GiB     8x1 MiB 16-way set associative write-back L3$ 11 MiB 11,264 KiB 11,534,336 B 0.0107 GiB     8x1.375 MiB 11-way set associative write-back

Memory controller

[Edit/Modify Memory Info]

	Integrated Memory Controller
	Max Type DDR4-2400 Supports ECC Yes Max Mem 1 TiB Controllers 2 Channels 6 Max Bandwidth 107.3 GiB/s 109,875.2 MiB/s 115.212 GB/s 115,212.498 MB/s 0.105 TiB/s 0.115 TB/s Bandwidth Single 17.88 GiB/s Double 35.76 GiB/s Quad 71.53 GiB/s Hexa 107.3 GiB/s

Expansions

[Edit/Modify Expansions Info]

	Expansion Options
PCIe Revision: 3.0 Max Lanes: 48 Configuration: 1x16, x8, x4

Features

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX MMX Extension EMMX Extended MMX Extension SSE Streaming SIMD Extensions SSE2 Streaming SIMD Extensions 2 SSE3 Streaming SIMD Extensions 3 SSSE3 Supplemental SSE3 SSE4.1 Streaming SIMD Extensions 4.1 SSE4.2 Streaming SIMD Extensions 4.2 AVX Advanced Vector Extensions AVX2 Advanced Vector Extensions 2 AVX-512 Advanced Vector 512-bit AVX512F AVX-512 Foundation AVX512CD AVX-512 Conflict Detection AVX512BW AVX-512 Byte and Word AVX512DQ AVX-512 Doubleword and Quadword Instructions AVX512VL AVX-512 Vector Length AVX512_VNNI AVX-512 Vector Neural Network Instructions ABM Advanced Bit Manipulation BMI1 Bit Manipulation Instruction Set 1 BMI2 Bit Manipulation Instruction Set 2 FMA3 3-Operand Fused-Multiply-Add AES AES Encryption Instructions RdRand Hardware RNG ADX Multi-Precision Add-Carry CLMUL Carry-less Multiplication Extension F16C 16-bit Floating Point Conversion x86-16 16-bit x86 x86-32 32-bit x86 x86-64 64-bit x86 Real Real Mode Protected Protected Mode SMM System Management Mode FPU Integrated x87 FPU NX No-eXecute HT Hyper-Threading TBT 2.0 Turbo Boost Technology 2.0 EIST Enhanced SpeedStep Technology SST Speed Shift Technology TXT Trusted Execution Technology (SMX) vPro Intel vPro VT-x VT-x (Virtualization) VT-d VT-d (I/O MMU virtualization) EPT Extended Page Tables (SLAT) TSX Transactional Synchronization Extensions VMD Volume Management Device NM Node Manager KPT Key Protection Technology PTT Platform Trust Technology MBE Ctrl Mode-Based Execute Control DL Boost Deep Learning Boost

Frequencies

See also: Intel's CPU Frequency Behavior

[Modify Frequency Info]

Mode	Base	Turbo Frequency/Active Cores
		1	2	3	4	5	6	7	8
Normal	2,100MHz	3,200MHz	3,200MHz	3,000MHz	3,000MHz	2,500MHz	2,500MHz	2,500MHz	2,500MHz
AVX2	1,600MHz	3,000MHz	3,000MHz	2,600MHz	2,600MHz	2,000MHz	2,000MHz	2,000MHz	2,000MHz
AVX512	1,100MHz	2,000MHz	2,000MHz	1,800MHz	1,800MHz	1,400MHz	1,400MHz	1,400MHz	1,400MHz