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Godson-2E - Loongson
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Godson-2E
godson-2e.jpg
Godson-2E chip
General Info
DesignerLoongson
ManufacturerSTMicroelectronics
Model Number2E
Part NumberCZ70
MarketDesktop
Introduction2006 (announced)
March 18, 2006 (launched)
General Specs
FamilyGodson 2
SeriesGodson 2
Frequency1,000 MHz
Bus typeSysAD
Microarchitecture
ISAMIPS64 (MIPS)
MicroarchitectureGS464
Core NameGS464
Process90 nm
Transistors47,000,000
TechnologyCMOS
Die36 mm²
Word Size64 bit
Cores1
Threads1
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Power dissipation7 W
Vcore1.2 V

Godson-2E (龙芯2E) is a 64-bit MIPS performance processor developed by ICT and later Loongson for desktop computers. Introduced in early 2006, the Godson-2E operates at up to 1 GHz consuming 7W. This chip was manufactured on STMicroelectronics' 90 nm process and provides roughly three times the performance of 2C. This processor is known as China's first processor to reach gigahertz frequency.

The Godson-2E introduces a number of improvements over its predecessor, including double the clock frequency, the addition of a large L2 cache, and the integration of the northbridge on-die, supporting up to DDR-333.

Cache[edit]

Main article: GS464 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
1x64 KiB4-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
1x64 KiB4-way set associative 

L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  1x512 KiB4-way set associative 

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR-333
Supports ECCYes
Max Mem2 GiB
Controllers1
Channels1
Max Bandwidth4.967 GiB/s
5,086.208 MiB/s
5.333 GB/s
5,333.276 MB/s
0.00485 TiB/s
0.00533 TB/s
Bandwidth
Single 4.967 GiB/s

Graphics[edit]

This chip had no integrated graphics processing unit.

Die Shot[edit]

godson-2e die shot.png

References[edit]

  • Hu, Wei-Wu, and Jian Wang. "Making effective decisions in computer architects’ real-world: Lessons and experiences with Godson-2 processor designs." Journal of Computer Science and Technology 23.4 (2008): 620-632.
Facts about "Godson-2E - Loongson"
base frequency1,000 MHz (1 GHz, 1,000,000 kHz) +
bus typeSysAD +
core count1 +
core nameGS464 +
core voltage1.2 V (12 dV, 120 cV, 1,200 mV) +
designerLoongson +
die area36 mm² (0.0558 in², 0.36 cm², 36,000,000 µm²) +
familyGodson 2 +
first announced2006 +
first launchedMarch 18, 2006 +
full page nameloongson/godson 2/2e +
has ecc memory supporttrue +
instance ofmicroprocessor +
isaMIPS64 +
isa familyMIPS +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description4-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description4-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description4-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
ldateMarch 18, 2006 +
main imageFile:godson-2e.jpg +
main image captionGodson-2E chip +
manufacturerSTMicroelectronics +
market segmentDesktop +
max cpu count1 +
max memory bandwidth4.967 GiB/s (5,086.208 MiB/s, 5.333 GB/s, 5,333.276 MB/s, 0.00485 TiB/s, 0.00533 TB/s) +
max memory channels1 +
microarchitectureGS464 +
model number2E +
nameGodson-2E +
part numberCZ70 +
power dissipation7 W (7,000 mW, 0.00939 hp, 0.007 kW) +
process90 nm (0.09 μm, 9.0e-5 mm) +
seriesGodson 2 +
smp max ways1 +
supported memory typeDDR-333 +
technologyCMOS +
thread count1 +
transistor count47,000,000 +
word size64 bit (8 octets, 16 nibbles) +