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Exynos 5433 - Samsung
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Exynos 5433
General Info
DesignerSamsung,
ARM Holdings
ManufacturerSamsung
Model Number5433
MarketMobile
IntroductionSeptember 7, 2014 (announced)
September 7, 2014 (launched)
General Specs
FamilyExynos
SeriesExynos 7
Frequency1,900 MHz, 1,300 MHz
Microarchitecture
ISAARMv8 (ARM)
MicroarchitectureCortex-A57, Cortex-A53
Core NameCortex-A57, Cortex-A53
Process20 nm
TechnologyCMOS
Die113 mm²
Word Size64 bit
Cores8
Threads8
Max CPUs1 (Uniprocessor)

Exynos 5433 is a 64-bit octa-core ARM high performance mobile system on a chip designed by Samsung and introduced in early 2014. The processor is fabricated on Samsung's 20 nm process and features 8 cores in a big.LITTLE configuration consisting of 4 Cortex-A57 big cores and 4 Cortex-A53 little cores. This chip supports up to 3 GiB of dual-channel LPDDR3-1866 memory and incorporates a Mali-T760 MP6 GPU.

Cache[edit]

Main articles: Cortex-A57 § Cache and Cortex-A53 § Cache


Cortex-A57 Cluster:

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$320 KiB
0.313 MiB
327,680 B
3.051758e-4 GiB
L1I$129 KiB
0.126 MiB
132,096 B
1.23024e-4 GiB
4x48 KiB  
L1D$128 KiB
0.125 MiB
131,072 B
1.220703e-4 GiB
4x32 KiB  

L2$2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
  1x2 MiB  

Cortex-A53 Cluster:

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
L1I$128 KiB
0.125 MiB
131,072 B
1.220703e-4 GiB
4x32 KiB  
L1D$128 KiB
0.125 MiB
131,072 B
1.220703e-4 GiB
4x32 KiB  

L2$256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
  1x1 256 KiB  

Memory controller[edit]

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeLPDDR3-1866
Supports ECCNo
Max Mem3 GiB
Controllers1
Channels2
Width32 bit
Max Bandwidth13.91 GiB/s
Bandwidth
Single 6.95 GiB/s
Double 13.91 GiB/s

Graphics[edit]

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUMali-T760
DesignerARM Holdings
Execution Units6Max Displays2
Frequency700 MHz
0.7 GHz
700,000 KHz
Output

Max Resolution
 2560x1600

Standards
DirectX11
OpenCL1.2
OpenGL ES3.2
OpenVG1.1
Vulkan1.0
  • Full HD 120fps encoding and decoding
  • HEVC decoding, VP8 Codec

Camera[edit]

  • Front 3.7 MP
  • Rear 16 MP

Die[edit]

  • Samsung 20 nm process
  • 113 mm² die size
  • Mali-T760 (6 EU)
  • Quad-core Cortex-A53 (small cores)
    • 32 KiB L1I$ and 32 KiB L1D$ per core, and a shared 256 KiB L2
    • 4.4 mm² per cluster
      • ~1 mm² per core
      • ~0.55 mm² for 256 KiB L2 cache
  • Quad-core Cortex-A57 (big cores)
    • 48KB L1I$ and 32KB L1D$ per core, and a shared 2 MiB L2
    • 15.85 mm² per cluster
      • ~3 mm² per core
      • ~3.87 mm² for 2 MiB L2 cache


exynos 5433 die.png

Utilizing devices[edit]

  • Samsung Galaxy Note 4
  • Samsung Galaxy Note Edge
  • Samsung Galaxy Tab S2

This list is incomplete; you can help by expanding it.

Bibliography[edit]

  • Pyo, Jungyul, et al. "23.1 20nm high-K metal-gate heterogeneous 64b quad-core CPUs and hexa-core GPU for high-performance and energy-efficient mobile application processor." Solid-State Circuits Conference-(ISSCC), 2015 IEEE International. IEEE, 2015
Facts about "Exynos 5433 - Samsung"
base frequency1,900 MHz (1.9 GHz, 1,900,000 kHz) + and 1,300 MHz (1.3 GHz, 1,300,000 kHz) +
core count8 +
core nameCortex-A57 + and Cortex-A53 +
designerSamsung + and ARM Holdings +
die area113 mm² (0.175 in², 1.13 cm², 113,000,000 µm²) +
familyExynos +
first announcedSeptember 7, 2014 +
first launchedSeptember 7, 2014 +
full page namesamsung/exynos/5433 +
has ecc memory supportfalse +
instance ofmicroprocessor +
integrated gpuMali-T760 +
integrated gpu base frequency700 MHz (0.7 GHz, 700,000 KHz) +
integrated gpu designerARM Holdings +
isaARMv8 +
isa familyARM +
l1$ size0.313 MiB (320 KiB, 327,680 B, 3.051758e-4 GiB) + and 0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
l1d$ size0.125 MiB (128 KiB, 131,072 B, 1.220703e-4 GiB) +
l1i$ size0.126 MiB (129 KiB, 132,096 B, 1.23024e-4 GiB) + and 0.125 MiB (128 KiB, 131,072 B, 1.220703e-4 GiB) +
l2$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + and 0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
ldateSeptember 7, 2014 +
manufacturerSamsung +
market segmentMobile +
max cpu count1 +
max memory channels2 +
microarchitectureCortex-A57 + and Cortex-A53 +
model number5433 +
nameExynos 5433 +
process20 nm (0.02 μm, 2.0e-5 mm) +
seriesExynos 7 +
supported memory typeLPDDR3-1866 +
technologyCMOS +
thread count8 +
used bySamsung Galaxy Note 4 +, Samsung Galaxy Note Edge + and Samsung Galaxy Tab S2 +
word size64 bit (8 octets, 16 nibbles) +