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Cortex-A75 µarch | |
General Info | |
Arch Type | CPU |
Designer | ARM Holdings |
Manufacturer | TSMC |
Introduction | May 29, 2017 |
Process | 16 nm, 14 nm, 12 nm, 10 nm, 7 nm |
Core Configs | 1, 2, 4, 8 |
Pipeline | |
OoOE | Yes |
Speculative | Yes |
Reg Renaming | Yes |
Stages | 11-13 |
Decode | 3-way |
Instructions | |
ISA | ARMv8.2 |
Extensions | FPU, NEON |
Cache | |
L1I Cache | 8-64 KiB/core 4-way set associative |
L1D Cache | 8-64 KiB/core 4-way set associative |
L2 Cache | 64-256-512 KiB/core |
L3 Cache | 0-4 MiB/Cluster |
Succession | |
Cortex-A75 (codename Prometheus) is the successor to Cortex-A73, a low-power high-performance ARM microarchitecture designed by ARM Holdings for the mobile market.
This microarchitecture is designed as a synthesizable IP core and is sold to other semiconductor companies to be implemented in their own chips. The Cortex-A75, which implemented the ARMv8.2 ISA, is the a performant core which is often combined with a number of lower power cores (e.g. Cortex-A55) in a DynamIQ big.LITTLE configuration to achieve better energy/performance.
Contents
Compiler support[edit]
Compiler | Arch-Specific | Arch-Favorable |
---|---|---|
Arm Compiler | -mcpu=cortex-a75 |
-mtune=cortex-a75
|
GCC | -mcpu=cortex-a75 |
-mtune=cortex-a75
|
LLVM | -mcpu=cortex-a75 |
-mtune=cortex-a75
|
If the Cortex-A75 is coupled with the Cortex-A55 in a big.LITTLE system,
- GCC also supports the following option:
Compiler | Tune |
---|---|
GCC | -mtune=cortex-a75.cortex-a55
|
Architecture[edit]
Key changes from Cortex-A73[edit]
The ARM Cortex-A75 is a central processing unit implementing the ARMv8.2-A 64-bit instruction set designed by ARM Holdings. The Cortex-A75 is a 3-wide decode out-of-order superscalar pipeline. The Cortex-A75 serves as the successor of the Cortex-A73, designed to improve performance by 20% over the Cortex-A73 in mobile applications while maintaining the same efficiency.
- Design
According to ARM, the Cortex-A75 is expected to offer 16–48% better performance than an Cortex-A73 and is targeted beyond mobile workloads. The Cortex-A75 also features an increased TDP envelope of 2 W, enabling increased performance. The Cortex-A75 and Cortex-A55 cores are the first products to support ARM's DynamIQ technology. The successor to big.LITTLE, this technology is designed to be more flexible and scalable when designing multi-core products.
- Licensing
The Cortex-A75 is available as SIP core to licensees, and its design makes it suitable for integration with other SIP cores (e.g. GPU, display controller, DSP, image processor, etc.) into one die constituting a system on a chip (SoC). ARM has also collaborated with Qualcomm for a semi-custom version of the Cortex-A75, used within the Kryo 385 Gold CPU. This semi-custom core is also used in some Qualcomm's mid-range SoCs as Kryo 360 Gold.
Block Diagram[edit]
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Memory Hierarchy[edit]
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All Cortex-A75 Processors[edit]
List of Cortex-A75-based Processors | ||||||||
---|---|---|---|---|---|---|---|---|
Main processor | Integrated Graphics | |||||||
Model | Family | Launched | Process | Arch | Cores | Frequency | GPU | Frequency |
9820 | Exynos | January 2019 | 8 nm 0.008 μm 8.0e-6 mm | Cortex-A75, Cortex-A55, Exynos M4 | 8 | Mali-G76 | ||
9825 | Exynos | 2019 | 7 nm 0.007 μm 7.0e-6 mm | Cortex-A75, Cortex-A55, M4 | 8 | 2.73 GHz 2,730 MHz , 2.4 GHz2,730,000 kHz 2,400 MHz , 1.95 GHz2,400,000 kHz 1,950 MHz 1,950,000 kHz | Mali-G76 | 754 MHz 0.754 GHz 754,000 KHz |
G80 | Helio | 3 February 2020 | 12 nm 0.012 μm 1.2e-5 mm | Cortex-A75, Cortex-A55 | 8 | 1.8 GHz 1,800 MHz , 2 GHz1,800,000 kHz 2,000 MHz 2,000,000 kHz | Mali-G52 | 950 MHz 0.95 GHz 950,000 KHz |
P65 | Helio | 25 June 2019 | 12 nm 0.012 μm 1.2e-5 mm | Cortex-A75, Cortex-A55 | 8 | 2 GHz 2,000 MHz 2,000,000 kHz | Mali-G52 | 820 MHz 0.82 GHz 820,000 KHz |
P90 | Helio | 13 December 2018 | 12 nm 0.012 μm 1.2e-5 mm | Cortex-A75, Cortex-A55 | 8 | 2.2 GHz 2,200 MHz , 2 GHz2,200,000 kHz 2,000 MHz 2,000,000 kHz | PowerVR GM 9446 | 970 MHz 0.97 GHz 970,000 KHz |
SDM670 | Snapdragon 600 | 8 August 2018 | 10 nm 0.01 μm 1.0e-5 mm | Cortex-A75, Cortex-A55 | 8 | 1.7 GHz 1,700 MHz , 2.2 GHz1,700,000 kHz 2,200 MHz 2,200,000 kHz | Adreno 615 | |
SDM710 | Snapdragon 700 | 23 May 2018 | 10 nm 0.01 μm 1.0e-5 mm | Cortex-A75, Cortex-A55 | 8 | 2.2 GHz 2,200 MHz , 1.7 GHz2,200,000 kHz 1,700 MHz 1,700,000 kHz | Adreno 616 | 500 MHz 0.5 GHz 500,000 KHz |
SDM712 | Snapdragon 700 | 6 February 2019 | 10 nm 0.01 μm 1.0e-5 mm | Cortex-A75, Cortex-A55 | 8 | 2.3 GHz 2,300 MHz , 1.7 GHz2,300,000 kHz 1,700 MHz 1,700,000 kHz | Adreno 616 | 550 MHz 0.55 GHz 550,000 KHz |
SDM845 | Snapdragon 800 | February 2018 | 10 nm 0.01 μm 1.0e-5 mm | Cortex-A75, Cortex-A55 | 8 | 2.8 GHz 2,800 MHz , 1.7 GHz2,800,000 kHz 1,700 MHz 1,700,000 kHz | Adreno 630 GPU | 710 MHz 0.71 GHz 710,000 KHz |
SDM850 | Snapdragon 800, Snapdragon 8 | 5 June 2018 | 10 nm 0.01 μm 1.0e-5 mm | Cortex-A75, Cortex-A55 | 8 | 2.96 GHz 2,960 MHz , 1.77 GHz2,960,000 kHz 1,770 MHz 1,770,000 kHz | Adreno 630 | 710 MHz 0.71 GHz 710,000 KHz |
Count: 10 |
codename | Cortex-A75 + |
core count | 1 +, 2 +, 4 + and 8 + |
designer | ARM Holdings + |
first launched | May 29, 2017 + |
full page name | arm holdings/microarchitectures/cortex-a75 + |
instance of | microarchitecture + |
instruction set architecture | ARMv8.2 + |
manufacturer | TSMC + |
microarchitecture type | CPU + |
name | Cortex-A75 + |
pipeline stages (max) | 13 + |
pipeline stages (min) | 11 + |
process | 16 nm (0.016 μm, 1.6e-5 mm) +, 14 nm (0.014 μm, 1.4e-5 mm) +, 12 nm (0.012 μm, 1.2e-5 mm) +, 10 nm (0.01 μm, 1.0e-5 mm) + and 7 nm (0.007 μm, 7.0e-6 mm) + |