From WikiChip
K6-2+ - AMD
< amd(Redirected from AMD k6-2+)

K6-2+
amd k6-2+.svg
Marketing Logo
Developer AMD
Manufacturer AMD
Type Microprocessors
Introduction April 18, 2000 (announced)
April 18, 2000 (launch)
ISA IA-32
µarch K6-III
Word size 32 bit
4 octets
8 nibbles
Process 180 nm
0.18 μm
1.8e-4 mm
Technology CMOS
Clock 350 MHz-570 MHz
Package CPGA-321
Socket Socket 7, Super Socket 7
Succession
K6-III

K6-2+ (K6-2 Plus) was a family of mobile microprocessors introduced by AMD in early 2000 as a replacement for the previous generation of K6-III mobile processors. K6-2+ enjoyed higher performance and lower voltage as a result of a die shrink. Contrary to their namesake, these models were based on AMD's K6-III microarchitecture and not K6-2. K6-2+, unlike K6-III+, only had half the L2$ as the previous K6-III-P models (albeit still operating at full core frequency).

Overview[edit]

Introduced in April of 2000 and on AMD's new 0.18 µm process, the K6-2+ was designed to replace the older K6-III-P mobile processors. As with the K6-III+, the K6-2+ were also based on the K6-III microarchitecture. Unlike the K6-III+ which was also released at the same time, the K6-2+ only had half the L2$ (128 KB), but still operated at full core speed. Due to the processor shrink, the new models operated at higher frequency, dissipated less power, and operated at lower voltages. Many models could be clocked as high as 600-650 MHz. K6-III+ never recived as much attention because AMD was focused on promoting their Athlon and Duron (K7) families instead. AMD K6-2+ Instructions set: MMX , 3DNow! , Extended 3DNow! (Extended MMX Not support)

Models[edit]

New text document.svg This section is empty; you can help add the missing info by editing this page.

Documents[edit]

Datasheets[edit]

See also[edit]

Facts about "K6-2+ - AMD"
designerAMD +
first announcedApril 18, 2000 +
first launchedApril 18, 2000 +
full page nameamd/k6-2+ +
instance ofmicroprocessor family +
instruction set architectureIA-32 +
main designerAMD +
manufacturerAMD +
microarchitectureK6-III +
nameK6-2+ +
packageCPGA-321 +
process180 nm (0.18 μm, 1.8e-4 mm) +
socketSocket 7 + and Super Socket 7 +
technologyCMOS +
word size32 bit (4 octets, 8 nibbles) +