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Xeon Platinum 9242 - Intel
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Xeon Platinum 9242 | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | 9242 |
Market | Server, HPC |
Introduction | April 2, 2019 (announced) April 2, 2019 (launched) |
Shop | Amazon |
General Specs | |
Family | Xeon Platinum |
Series | 9200 |
Locked | Yes |
Frequency | 2,300 MHz |
Turbo Frequency | 3,800 MHz (1 core) |
Bus type | DMI 3.0 |
Bus rate | 4 × 8 GT/s |
Clock multiplier | 23 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Cascade Lake |
Platform | Walker Pass |
Chipset | Lewisburg |
Core Name | Cascade Lake AP |
Core Family | 6 |
Process | 14 nm |
Technology | CMOS |
MCP | Yes (2 dies) |
Word Size | 64 bit |
Cores | 48 |
Threads | 96 |
Max Memory | 2 TiB |
Multiprocessing | |
Max SMP | 2-Way (Multiprocessor) |
Electrical | |
TDP | 350 W |
Packaging | |
Package | FCBGA-5903 (BGA) |
Pitch | 0.99 mm |
Contacts | 5903 |
Xeon Platinum 9242 is a 48-core 64-bit high-performance x86 server microprocessor introduced by Intel in early 2019. The 9242 is based on the Cascade Lake microarchitecture and is fabricated on Intel's 14 nm process. It operates at 2.3 GHz with a TDP of 350 W and a turbo boost of up to 3.8 GHz. This processor supports up to twelve channels of DDR4-2933 memory.
This processor cannot be purchased independently and is only sold as part of Intel's S9200WK Compute Module.
Contents
Cache[edit]
- Main article: Cascade Lake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller[edit]
Integrated Memory Controller
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Expansions[edit]
Expansion Options |
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Features[edit]
[Edit/Modify Supported Features]
Facts about "Xeon Platinum 9242 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon Platinum 9242 - Intel#pcie + |
base frequency | 2,300 MHz (2.3 GHz, 2,300,000 kHz) + |
bus links | 4 + |
bus rate | 8,000 MT/s (8 GT/s, 8,000,000 kT/s) + |
bus type | DMI 3.0 + |
chipset | Lewisburg + |
clock multiplier | 23 + |
core count | 48 + |
core family | 6 + |
core name | Cascade Lake AP + |
designer | Intel + |
die count | 2 + |
family | Xeon Platinum + |
first announced | April 2, 2019 + |
first launched | April 2, 2019 + |
full page name | intel/xeon platinum/9242 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has advanced vector extensions 512 | true + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables + and Transactional Synchronization Extensions + |
has intel enhanced speedstep technology | true + |
has intel speed shift technology | true + |
has intel trusted execution technology | true + |
has intel turbo boost technology 2 0 | true + |
has intel vpro technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has simultaneous multithreading | true + |
has transactional synchronization extensions | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
is multi-chip package | true + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 3,072 KiB (3,145,728 B, 3 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 1,536 KiB (1,572,864 B, 1.5 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 1,536 KiB (1,572,864 B, 1.5 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 48 MiB (49,152 KiB, 50,331,648 B, 0.0469 GiB) + |
l3$ description | 11-way set associative + |
l3$ size | 71.5 MiB (73,216 KiB, 74,973,184 B, 0.0698 GiB) + |
ldate | April 2, 2019 + |
main image | + |
manufacturer | Intel + |
market segment | Server + and HPC + |
max cpu count | 2 + |
max memory | 2,097,152 MiB (2,147,483,648 KiB, 2,199,023,255,552 B, 2,048 GiB, 2 TiB) + |
max memory bandwidth | 262.26 GiB/s (268,554.24 MiB/s, 281.6 GB/s, 281,599.531 MB/s, 0.256 TiB/s, 0.282 TB/s) + |
max memory channels | 12 + |
microarchitecture | Cascade Lake + |
model number | 9242 + |
name | Xeon Platinum 9242 + |
package | FCBGA-5903 + |
platform | Walker Pass + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
series | 9200 + |
smp max ways | 2 + |
supported memory type | DDR4-2933 + |
tdp | 350 W (350,000 mW, 0.469 hp, 0.35 kW) + |
technology | CMOS + |
thread count | 96 + |
turbo frequency (1 core) | 3,800 MHz (3.8 GHz, 3,800,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |