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codenameVanilla-5 +
designerUniversity of Michigan +, University of California + and Cornell University +
full page nameumich/microarchitectures/vanilla-5 +
instance ofmicroarchitecture +
instruction set architectureRISC-V +
manufacturerTSMC +
microarchitecture typeCPU +
nameVanilla-5 +
pipeline stages5 +
process16 nm (0.016 μm, 1.6e-5 mm) +