From WikiChip
Difference between revisions of "sun microsystems/ultrasparc/stp1030bga-182"
< sun microsystems‎ | ultrasparc

m (Bot: moving all {{mpu}} to {{chip}})
 
(5 intermediate revisions by one other user not shown)
Line 1: Line 1:
 
{{sun title|UltraSPARC-I 182MHz}}
 
{{sun title|UltraSPARC-I 182MHz}}
−
{{mpu
+
{{chip
 
|name=UltraSPARC-I 182MHz
 
|name=UltraSPARC-I 182MHz
 
|no image=Yes
 
|no image=Yes
Line 13: Line 13:
 
|release price=$1595
 
|release price=$1595
 
|family=UltraSPARC
 
|family=UltraSPARC
 +
|series=UltraSPARC-I
 
|frequency=182 MHz
 
|frequency=182 MHz
 
|isa=SPARC V9
 
|isa=SPARC V9
 
|isa family=SPARC
 
|isa family=SPARC
−
|microarch=UltraSPARC
+
|microarch=UltraSPARC-I
 
|process=0.5 µm
 
|process=0.5 µm
 
|transistors=5,200,000
 
|transistors=5,200,000
 
|technology=CMOS
 
|technology=CMOS
 +
|die area=310 mm²
 
|word size=64 bit
 
|word size=64 bit
 
|core count=1
 
|core count=1
Line 26: Line 28:
 
|package module 1={{packages/sun microsystems/bga-521}}
 
|package module 1={{packages/sun microsystems/bga-521}}
 
}}
 
}}
−
'''UltraSPARC-I 143MHz''' was a {{arch|64}} [[SPARC]] microprocessor designed and introduced by [[Sun Microsystems]] in early [[1996]].
+
'''UltraSPARC-I 182MHz''' was a {{arch|64}} [[SPARC]] microprocessor designed and introduced by [[Sun Microsystems]] in early [[1996]].
 +
 
 +
== Cache ==
 +
{{main|sun microsystems/microarchitectures/ultrasparc-i#Memory_Hierarchy|l1=UltraSPARC-I § Cache}}
 +
In addition to the on-chip cache, this chip also required an external cache that is either 512 KiB, 1 MiB, 2 MiB, or 4 MiB with a line size of 64 bytes.
 +
{{cache size
 +
|l1 cache=32 KiB
 +
|l1i cache=16 KiB
 +
|l1i break=1x16 KiB
 +
|l1i desc=2-way set associative
 +
|l1d cache=16 KiB
 +
|l1d break=1x16 KiB
 +
|l1d desc=16-way set associative
 +
|l1d policy=write-through
 +
}}

Latest revision as of 16:32, 13 December 2017

Edit Values
UltraSPARC-I 182MHz
General Info
DesignerSun Microsystems
ManufacturerTexas Instruments
Model NumberUltraSPARC-I 182MHz
Part NumberSTP103OBGA-182
MarketServer, Workstation
IntroductionOctober 2, 1995 (announced)
February, 1996 (launched)
Release Price$1595
General Specs
FamilyUltraSPARC
SeriesUltraSPARC-I
Frequency182 MHz
Microarchitecture
ISASPARC V9 (SPARC)
MicroarchitectureUltraSPARC-I
Process0.5 µm
Transistors5,200,000
TechnologyCMOS
Die310 mm²
Word Size64 bit
Cores1
Threads1
Electrical
Vcore3.3 V
Packaging
PackageBGA-521 (BGA)UltraSPARC-I package back.png
Pins521

UltraSPARC-I 182MHz was a 64-bit SPARC microprocessor designed and introduced by Sun Microsystems in early 1996.

Cache[edit]

Main article: UltraSPARC-I § Cache

In addition to the on-chip cache, this chip also required an external cache that is either 512 KiB, 1 MiB, 2 MiB, or 4 MiB with a line size of 64 bytes.

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$32 KiB
32,768 B
0.0313 MiB
L1I$16 KiB
16,384 B
0.0156 MiB
1x16 KiB2-way set associative 
L1D$16 KiB
16,384 B
0.0156 MiB
1x16 KiB16-way set associativewrite-through
Retrieved from "https://en.wikichip.org/w/index.php?title=sun_microsystems/ultrasparc/stp1030bga-182&oldid=71208"
Facts about "UltraSPARC-I 182MHz - Sun Microsystems"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
UltraSPARC-I 182MHz - Sun Microsystems#package +
base frequency182 MHz (0.182 GHz, 182,000 kHz) +
core count1 +
core voltage3.3 V (33 dV, 330 cV, 3,300 mV) +
designerSun Microsystems +
die area310 mm² (0.481 in², 3.1 cm², 310,000,000 µm²) +
familyUltraSPARC +
first announcedOctober 2, 1995 +
first launchedFebruary 1996 +
full page namesun microsystems/ultrasparc/stp1030bga-182 +
instance ofmicroprocessor +
isaSPARC V9 +
isa familySPARC +
l1$ size32 KiB (32,768 B, 0.0313 MiB) +
l1d$ description16-way set associative +
l1d$ size16 KiB (16,384 B, 0.0156 MiB) +
l1i$ description2-way set associative +
l1i$ size16 KiB (16,384 B, 0.0156 MiB) +
ldateFebruary 1996 +
manufacturerTexas Instruments +
market segmentServer + and Workstation +
microarchitectureUltraSPARC-I +
model numberUltraSPARC-I 182MHz +
nameUltraSPARC-I 182MHz +
packageBGA-521 +
part numberSTP103OBGA-182 +
process500 nm (0.5 μm, 5.0e-4 mm) +
release price$ 1,595.00 (€ 1,435.50, £ 1,291.95, ¥ 164,811.35) +
seriesUltraSPARC-I +
technologyCMOS +
thread count1 +
transistor count5,200,000 +
word size64 bit (8 octets, 16 nibbles) +