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Difference between revisions of "risc-v/microarchitectures"
< risc-v

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| [[Nvidia]] || RV64I || {{nvidia|NV-RISCV|l=arch}}
 
| [[Nvidia]] || RV64I || {{nvidia|NV-RISCV|l=arch}}
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| rowspan="3" | [[Codasip]] || RV32E || {{codasip|CODIX-BK1|l=arch}}
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| RV32E, RV32I || {{codasip|CODIX-BK3|l=arch}}
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| RV32I/RV64I || {{codasip|CODIX-BK5|l=arch}}
 
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Revision as of 19:36, 1 March 2018

RISC-V
Instruction Set Architecture
General
Base Variants(base)
Standard Extensions(all)
Topics

v · d · e

Various microarchitectures have been designed for RISC-V by a number of companies. Below is a list of those microarchitectures.

List of Microarchitectures

Designer ISA Microarchitectures
SiFive RV32IMAC E31
RV64IMAC E51
RV64GC E54-MC
Andes RV32IMAC N25
Esperanto RV64GC ET-Minion, ET-Maxion
Nvidia RV64I NV-RISCV
Codasip RV32E CODIX-BK1
RV32E, RV32I CODIX-BK3
RV32I/RV64I CODIX-BK5
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