Revision history of "intel/xeon gold/5115"

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(cur | prev) 02:27, 23 July 2017‎ ChippyBot (talk | contribs)‎ m . . (4,230 bytes) (+17)‎ . . (Bot: Automated text replacement (-{{intel|Skylake|l=arch}} +{{intel|Skylake (server)|Skylake|l=arch}})) (undo)
(cur | prev) 02:14, 23 July 2017‎ ChippyBot (talk | contribs)‎ m . . (4,213 bytes) (+9)‎ . . (Bot: Automated text replacement (-|microarch=Skylake +|microarch=Skylake (server))) (undo)
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(cur | prev) 21:10, 8 July 2017‎ At32Hz (talk | contribs)‎ . . (1,168 bytes) (+1,168)‎ . . (Created page with "{{intel title|Xeon Gold 5115}} {{mpu |future=Yes |name=Xeon Gold 5115 |no image=Yes |designer=Intel |manufacturer=Intel |model number=5115 |part number=CD8067303535601 |market...")

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Xeon Gold 5115 - Intel#io +
base frequency	2,400 MHz (2.4 GHz, 2,400,000 kHz) +
chipset	Lewisburg +
clock multiplier	24 +
core count	10 +
core family	6 +
core name	Skylake SP +
core stepping	M0 +
cpuid	0x50654 +
designer	Intel +
family	Xeon Gold +
first announced	July 11, 2017 +
first launched	July 11, 2017 +
full page name	intel/xeon gold/5115 +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has advanced vector extensions 512	true +
has ecc memory support	true +
has extended page tables support	true +
has feature	Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Transactional Synchronization Extensions +, Extended Page Tables + and Advanced Vector Extensions 512 +
has intel enhanced speedstep technology	true +
has intel speed shift technology	true +
has intel trusted execution technology	true +
has intel turbo boost technology 2 0	true +
has intel vpro technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has simultaneous multithreading	true +
has transactional synchronization extensions	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
isa	x86-64 +
isa family	x86 +
l1$ size	640 KiB (655,360 B, 0.625 MiB) +
l1d$ description	8-way set associative +
l1d$ size	320 KiB (327,680 B, 0.313 MiB) +
l1i$ description	8-way set associative +
l1i$ size	320 KiB (327,680 B, 0.313 MiB) +
l2$ description	16-way set associative +
l2$ size	10 MiB (10,240 KiB, 10,485,760 B, 0.00977 GiB) +
l3$ description	11-way set associative +
l3$ size	13.75 MiB (14,080 KiB, 14,417,920 B, 0.0134 GiB) +
ldate	July 11, 2017 +
main image	+
manufacturer	Intel +
market segment	Server +
max case temperature	349.15 K (76 °C, 168.8 °F, 628.47 °R) +
max cpu count	4 +
max dts temperature	90 °C +
max memory	786,432 MiB (805,306,368 KiB, 824,633,720,832 B, 768 GiB, 0.75 TiB) +
max memory bandwidth	107.3 GiB/s (109,875.2 MiB/s, 115.212 GB/s, 115,212.498 MB/s, 0.105 TiB/s, 0.115 TB/s) +
max memory channels	6 +
max pcie lanes	48 +
microarchitecture	Skylake (server) +
min case temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min dts temperature	0 °C +
model number	5115 +
name	Xeon Gold 5115 +
package	FCLGA-3647 +
part number	CD8067303535601 +
platform	Purley +
process	14 nm (0.014 μm, 1.4e-5 mm) +
release price	$ 1,221.00 (€ 1,098.90, £ 989.01, ¥ 126,165.93) +
s-spec	SR3GB +
s-spec (qs)	QMXG +
series	5100 +
smp interconnect	UPI +
smp interconnect links	3 +
smp interconnect rate	10.4 GT/s +
smp max ways	4 +
socket	Socket P + and LGA-3647 +
supported memory type	DDR4-2400 +
tdp	85 W (85,000 mW, 0.114 hp, 0.085 kW) +
technology	CMOS +
thread count	20 +
turbo frequency (1 core)	3,200 MHz (3.2 GHz, 3,200,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +

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