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== Overview == | == Overview == | ||
− | Released in July 2017, the Xeon Bronze are the successor to the {{intel|Xeon E5}}/{{intel|Xeon E7|E7}} families. Xeon Bronze is geared toward entry-level dual-socket server and workstation microprocessors. | + | Released in July 2017, the Xeon Bronze are the successor to the {{intel|Xeon E5}}/{{intel|Xeon E7|E7}} families. Xeon Bronze is geared toward entry-level dual-socket server and workstation microprocessors. Those processors are ideally positioned for price-sensitive applications which require light-range workloads with enhanced security features and large memory. Additionally, those processors incorporate a number of {{intel|Ultra Path Interconnect}} (UPI) links. Unlike the higher tier Xeon families, the Xeon Bronze doesn't have {{intel|Turbo Boost Technology}} or {{intel|Hyper-Threading}} support. |
== Members == | == Members == | ||
=== Skylake === | === Skylake === | ||
− | {{see also|intel/microarchitectures/skylake|l1=Skylake µarch}} | + | {{see also|intel/microarchitectures/skylake (server)|l1=Skylake µarch}} |
+ | Introduced in July 2017, the {{intel|Skylake (server)|Skylake|l=arch}}-based Xeon Bronze microprocessors are all dual-socket multiprocessors with up to [[8 cores]] and 8 threads. Additionally, all Xeon Bronze processors support: | ||
+ | |||
+ | * '''TDP:''' 85 W | ||
+ | * '''Mem:''' 768 GiB hexa-channel DDR4-2133 ECC memory. | ||
+ | * '''I/O:''' 48 PCIe 3 lanes | ||
+ | * '''ISA:''' Everything up to AVX-512 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, AVX2, AVX512F, AVX512CD, AVX512BW, AVX512DQ, AVX512VL) | ||
+ | * '''Features:''' {{intel|Speed Shift}}, {{intel|vPro}}, {{intel|VT-x}}, {{intel|TSX}}, {{intel|TXT}}, {{intel|Volume Management Device}} (VMD), {{intel|Mode-based Execute Control}} (MBE), {{intel|Key Protection Technology}} (KPT), and {{intel|Platform Trust Technology}} (PTT). | ||
+ | |||
+ | All Xeon Bronze processors support QuickAssist Technology which is integrated on the chipset as well as the Omni-Path Architecture on the chipset as well as via discrete PCIe cards. All models also support 2 {{intel|Ultra Path Interconnect}} (UPI) links. | ||
+ | |||
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− | <table class="comptable sortable | + | <table class="comptable sortable tc4 tc5"> |
<tr class="comptable-header"><th> </th><th colspan="20">List of Skylake-based Xeon Bronze Processors</th></tr> | <tr class="comptable-header"><th> </th><th colspan="20">List of Skylake-based Xeon Bronze Processors</th></tr> | ||
− | <tr class="comptable-header"><th> </th><th colspan=" | + | <tr class="comptable-header"><th> </th><th colspan="6">Main processor</th><th colspan="2">Cache</th><th colspan="2">Memory</th></tr> |
− | {{comp table header 1|cols=Price | + | {{comp table header 1|cols=Price, Launched, Cores, Threads, Frequency, TDP, L2$, L3$, Mem Type, Max Mem}} |
− | {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Bronze]] [[microarchitecture::Skylake]] | + | {{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Bronze]] [[microarchitecture::Skylake (server)]] |
|?full page name | |?full page name | ||
|?model number | |?model number | ||
|?release price | |?release price | ||
− | |||
|?first launched | |?first launched | ||
|?core count | |?core count | ||
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|?base frequency#GHz | |?base frequency#GHz | ||
|?tdp | |?tdp | ||
+ | |?l2$ size | ||
+ | |?l3$ size | ||
+ | |?supported memory type | ||
|?max memory#GiB | |?max memory#GiB | ||
|format=template | |format=template | ||
|template=proc table 3 | |template=proc table 3 | ||
− | |userparam= | + | |userparam=12 |
|mainlabel=- | |mainlabel=- | ||
}} | }} | ||
− | {{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Bronze]] [[microarchitecture::Skylake]]}} | + | {{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Bronze]] [[microarchitecture::Skylake (server)]]}} |
</table> | </table> | ||
{{comp table end}} | {{comp table end}} |
Revision as of 07:17, 30 August 2018
Xeon Bronze | |
Xeon Bronze Logo | |
Developer | Intel |
Manufacturer | Intel |
Type | Microprocessors |
Introduction | May 4, 2017 (announced) July 11, 2017 (launch) |
Architecture | x86 server multiprocessors |
ISA | x86-64 |
µarch | Skylake |
Word size | 64 bit 8 octets
16 nibbles |
Process | 14 nm 0.014 μm
1.4e-5 mm |
Technology | CMOS |
Package | FCLGA-3647 |
Socket | LGA-3647 |
Succession | |
← | |
Xeon E7 Xeon E5 |
Xeon Bronze is a family of 64-bit x86 dual-socket multi-core entry-level server microprocessors introduced by Intel in 2017.
Contents
Overview
Released in July 2017, the Xeon Bronze are the successor to the Xeon E5/E7 families. Xeon Bronze is geared toward entry-level dual-socket server and workstation microprocessors. Those processors are ideally positioned for price-sensitive applications which require light-range workloads with enhanced security features and large memory. Additionally, those processors incorporate a number of Ultra Path Interconnect (UPI) links. Unlike the higher tier Xeon families, the Xeon Bronze doesn't have Turbo Boost Technology or Hyper-Threading support.
Members
Skylake
- See also: Skylake µarch
Introduced in July 2017, the Skylake-based Xeon Bronze microprocessors are all dual-socket multiprocessors with up to 8 cores and 8 threads. Additionally, all Xeon Bronze processors support:
- TDP: 85 W
- Mem: 768 GiB hexa-channel DDR4-2133 ECC memory.
- I/O: 48 PCIe 3 lanes
- ISA: Everything up to AVX-512 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, AVX2, AVX512F, AVX512CD, AVX512BW, AVX512DQ, AVX512VL)
- Features: Speed Shift, vPro, VT-x, TSX, TXT, Volume Management Device (VMD), Mode-based Execute Control (MBE), Key Protection Technology (KPT), and Platform Trust Technology (PTT).
All Xeon Bronze processors support QuickAssist Technology which is integrated on the chipset as well as the Omni-Path Architecture on the chipset as well as via discrete PCIe cards. All models also support 2 Ultra Path Interconnect (UPI) links.
List of Skylake-based Xeon Bronze Processors | ||||||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Main processor | Cache | Memory | ||||||||||||||||||
Model | Price | Launched | Cores | Threads | Frequency | TDP | L2$ | L3$ | Mem Type | Max Mem | ||||||||||
3104 | $ 213.00 € 191.70 £ 172.53 ¥ 22,009.29 | 11 July 2017 | 6 | 6 | 1.7 GHz 1,700 MHz 1,700,000 kHz | 85 W 85,000 mW 0.114 hp 0.085 kW | 6 MiB 6,144 KiB 6,291,456 B 0.00586 GiB | 8.25 MiB 8,448 KiB 8,650,752 B 0.00806 GiB | DDR4-2133 | 768 GiB 786,432 MiB 805,306,368 KiB 824,633,720,832 B 0.75 TiB | ||||||||||
3106 | $ 306.00 € 275.40 £ 247.86 ¥ 31,618.98 | 11 July 2017 | 8 | 8 | 1.7 GHz 1,700 MHz 1,700,000 kHz | 85 W 85,000 mW 0.114 hp 0.085 kW | 8 MiB 8,192 KiB 8,388,608 B 0.00781 GiB | 11 MiB 11,264 KiB 11,534,336 B 0.0107 GiB | DDR4-2133 | 768 GiB 786,432 MiB 805,306,368 KiB 824,633,720,832 B 0.75 TiB | ||||||||||
Count: 2 |
See also
designer | Intel + |
first announced | May 4, 2017 + |
first launched | July 11, 2017 + |
full page name | intel/xeon bronze + |
instance of | microprocessor family + |
instruction set architecture | x86-64 + |
main designer | Intel + |
manufacturer | Intel + |
microarchitecture | Skylake + |
name | Xeon Bronze + |
package | FCLGA-3647 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
socket | LGA-3647 + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |