Difference between revisions of "intel/microarchitectures/tiger lake"
Revision as of 23:49, 5 April 2018
- Main article: Cannon Lake § Process Technology
Tigerlake is set to use the same 10 nm process that was designed for Cannon Lake.
Not much is known about Tigerlake's architecture.
Key changes from Icelake
|Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release.|
Facts about "Tiger Lake - Microarchitectures - Intel"
|first launched||2019 +|
|full page name||intel/microarchitectures/tiger lake +|
|instance of||microarchitecture +|
|instruction set architecture||x86-64 +|
|microarchitecture type||CPU +|
|process||10 nm (0.01 μm, 1.0e-5 mm) +|