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Difference between revisions of "intel/microarchitectures/netburst (client)"
< intel‎ | microarchitectures

(Willamette)
(additional info for 1M and 2M L2)
 
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* {{intel|Prescott|l=core}} core
 
* {{intel|Prescott|l=core}} core
 
* [[90 nm process]]
 
* [[90 nm process]]
* 135 mm² die size
+
* 1M L2 112 mm², 2M L2 135 mm² die size
* 169,000,000 transistors
+
* 125M, 169,000,000 transistors
 
+
1M L2
 
 
 
:[[File:netburst prescott core die.png|700px]]
 
:[[File:netburst prescott core die.png|700px]]
 +
2M L2
 +
:[[File:Pentium_4_6xx-die_2M.jpg|700px]]
  
 
=== Additional Shots ===
 
=== Additional Shots ===

Latest revision as of 11:51, 26 August 2018

Edit Values
NetBurst µarch
General Info
Arch TypeCPU
DesignerIntel
ManufacturerIntel
IntroductionNovember 20, 2000
Phase-outApril, 2006
Process180 nm
Instructions
ISAx86-32, x86-64
Succession

NetBurst (also P68) was the microarchitecture for Intel's 180 nm process for desktops and servers as a successor to P6. NetBurst was replaced by the Core microarchitecture in early 2006.

Die[edit]

Willamette[edit]

p4 die slide.png


netburst willamette core die.png

Northwood[edit]


netburst northwood core die.png


Prescott[edit]

1M L2

netburst prescott core die.png

2M L2

Pentium 4 6xx-die 2M.jpg

Additional Shots[edit]

Additional die and wafer shots provided by Intel:

codenameNetBurst +
designerIntel +
first launchedNovember 20, 2000 +
full page nameintel/microarchitectures/netburst (client) +
instance ofmicroarchitecture +
instruction set architecturex86-32 + and x86-64 +
manufacturerIntel +
microarchitecture typeCPU +
nameNetBurst +
phase-outApril 2006 +
process180 nm (0.18 μm, 1.8e-4 mm) +