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Difference between revisions of "intel/core i3/i3-9100t"
< intel‎ | core i3

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== Cache ==
 
== Cache ==
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{{main|intel/microarchitectures/ice_lake#Memory_Hierarchy|l1=Ice Lake § Cache}}
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{{main|intel/microarchitectures/coffee_lake#Memory_Hierarchy|l1=Coffee Lake § Cache}}
 
{{cache size
 
{{cache size
 
|l1 cache=256 KiB
 
|l1 cache=256 KiB

Revision as of 01:13, 3 February 2018

Edit Values
Core i3-9100T
General Info
DesignerIntel
ManufacturerIntel
Model Numberi3-9100T
MarketDesktop
ShopAmazon
General Specs
FamilyCore i3
Seriesi3-9000
LockedYes
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureCoffee Lake
Core NameCoffee Lake R
Process14 nm
TechnologyCMOS
Word Size64 bit
Cores4
Threads8
Max Memory64 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP35 W

Core i3-9100T is a planned 64-bit mid-range performance x86 desktop processor by Intel set to be introduced in late 2018. The i3-9100T is fabricated on Intel's enhanced 14nm++ process based on the Coffee Lake microarchitecture.


DIL16 Blank.svg Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.


Water drop.svg Leaked Info! Some of the information presented in this article is solely based on leaks that were published online or obtained directly by WikiChip. It goes without saying that this information could change, be incomplete, wrong, or even made up. It's highly advised to wait for an official product announcement.


Cache

Main article: Coffee Lake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
262,144 B
0.25 MiB
L1I$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associative 
L1D$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associativewrite-back
L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  4x256 KiB4-way set associativewrite-back
L3$8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
  4x2 MiB16-way set associativewrite-back
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/core_i3/i3-9100t&oldid=73591"
Facts about "Core i3-9100T - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Core i3-9100T - Intel#package + and Core i3-9100T - Intel#pcie +
bus links4 +
bus rate8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus typeDMI 3.0 +
chipset300 series +
core count4 +
core family6 +
core model158 +
core nameCoffee Lake R +
core steppingB0 +
designerIntel +
device id0x3E91 +
die area126 mm² (0.195 in², 1.26 cm², 126,000,000 µm²) +
familyCore i3 +
full page nameintel/core i3/i3-9100t +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard + and Identity Protection Technology +
has intel enhanced speedstep technologytrue +
has intel identity protection technology supporttrue +
has intel secure key technologytrue +
has intel supervisor mode execution protectiontrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
integrated gpuUHD Graphics 630 +
integrated gpu base frequency350 MHz (0.35 GHz, 350,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units24 +
integrated gpu max frequency1,100 MHz (1.1 GHz, 1,100,000 KHz) +
integrated gpu max memory65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB) +
isax86-64 +
isa familyx86 +
l1$ size256 KiB (262,144 B, 0.25 MiB) +
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description4-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ description12-way set associative +
l3$ size6 MiB (6,144 KiB, 6,291,456 B, 0.00586 GiB) +
ldate3000 +
main imageFile:coffee lake s (front).png +
manufacturerIntel +
market segmentDesktop +
max cpu count1 +
max memory65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
max memory bandwidth35.76 GiB/s (36,618.24 MiB/s, 38.397 GB/s, 38,397.008 MB/s, 0.0349 TiB/s, 0.0384 TB/s) +
max memory channels2 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureCoffee Lake +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberi3-9100T +
nameCore i3-9100T +
packageFCLGA-1151 +
platformCoffee Lake +
process14 nm (0.014 μm, 1.4e-5 mm) +
seriesi3-9000 +
smp max ways1 +
socketLGA-1151 +
supported memory typeDDR4-2400 +
tdp35 W (35,000 mW, 0.0469 hp, 0.035 kW) +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensionstrue +
x86/has software guard extensionstrue +