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PipeRench - Carnegie Mellon
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cmu piperench logo.gif
General Info
DesignerCarnegie Mellon University
IntroductionApril, 2000 (announced)
2002 (launched)
General Specs
Frequency120 MHz
Bus speed60 MHz
Clock multiplier2
Process180 nm
Die49 mm²
Power dissipation4 W

PipeRench was a research microprocessor designed at Carnegie Mellon University in the early 2000s. PipeRench was developed with a reconfigurable pipeline. This allows what would otherwise have to be implemented as specialized embedded chips to be implemented in a more generic way using PipeRench through reconfiguration.

Technology developed for this project was eventually leased to Rapport for their Kilocore architecture which eventually resulted in the KC256, a 256-core chip.


PipeRench is designed as a reconfigurable fabric. The chip breaks down each of its pipeline stages into individual stripes. Each strip has a set of simple execution units (EU/PE), register files, and a interconnection network. By configuring each of the stripes using the interconnect network, it's possible to virtualize different kind of custom hardware. The ALU, for example contains additional circuitry to facilitate bit-slicing.

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Die Shot

cmu piperench die.jpg

49 mm² on a 180 nm process.


External links

base frequency120 MHz (0.12 GHz, 120,000 kHz) +
bus speed60 MHz (0.06 GHz, 60,000 kHz) +
clock multiplier2 +
designerCarnegie Mellon University +
die area49 mm² (0.076 in², 0.49 cm², 49,000,000 µm²) +
first announcedApril 2000 +
first launched2002 +
full page namecmu/piperench +
instance ofmicroprocessor +
ldate2002 +
main imageFile:cmu piperench logo.gif +
main image captionLogo +
namePipeRench +
power dissipation4 W (4,000 mW, 0.00536 hp, 0.004 kW) +
process180 nm (0.18 μm, 1.8e-4 mm) +
technologyCMOS +
transistor count3,650,000 +