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codenameCortex-M55 +
core count1 +, 2 + and 4 +
designerARM Holdings +
first launchedFebruary 10, 2020 +
full page namearm holdings/microarchitectures/cortex-m55 +
instance ofmicroarchitecture +
instruction set architectureARMv8.1-M +
manufacturerTSMC +
microarchitecture typeCPU +
nameCortex-M55 +
pipeline stages (max)5 +
pipeline stages (min)4 +
process55 nm (0.055 μm, 5.5e-5 mm) +, 45 nm (0.045 μm, 4.5e-5 mm) +, 32 nm (0.032 μm, 3.2e-5 mm) +, 28 nm (0.028 μm, 2.8e-5 mm) +, 22 nm (0.022 μm, 2.2e-5 mm) +, 16 nm (0.016 μm, 1.6e-5 mm) +, 10 nm (0.01 μm, 1.0e-5 mm) +, 7 nm (0.007 μm, 7.0e-6 mm) + and 5 nm (0.005 μm, 5.0e-6 mm) +