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Difference between revisions of "apm/microarchitectures/skylark"
< apm

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{{apm title|Skylark|arch}}
 
{{apm title|Skylark|arch}}
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{{microarchitecture}}
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{{microarchitecture
 +
|atype=CPU
 +
|name=Skylark
 +
|designer=AppliedMicro
 +
|designer 2=Ampere Computing
 +
|manufacturer=TSMC
 +
|introduction=2018
 +
|process=16 nm
 +
|cores=32
 +
|type=Superscalar
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|oooe=Yes
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|speculative=Yes
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|renaming=Yes
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|isa=ARMv8
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|predecessor=Shadowcat
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|predecessor link=apm/microarchitectures/shadowcat
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|successor=Quicksilver
 +
|successor link=ampere computing/microarchitectures/shadowcat
 +
}}

Revision as of 03:10, 9 February 2018

Edit Values
Skylark µarch
General Info
Arch TypeCPU
DesignerAppliedMicro, Ampere Computing
ManufacturerTSMC
Introduction2018
Process16 nm
Core Configs32
Pipeline
TypeSuperscalar
OoOEYes
SpeculativeYes
Reg RenamingYes
Instructions
ISAARMv8
Succession
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Facts about "Skylark - Microarchitectures - AppliedMicro"
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codenameSkylark +
core count32 +
designerAppliedMicro + and Ampere Computing +
first launched2018 +
full page nameapm/microarchitectures/skylark +
instance ofmicroarchitecture +
instruction set architectureARMv8 +
manufacturerTSMC +
microarchitecture typeCPU +
nameSkylark +
process16 nm (0.016 μm, 1.6e-5 mm) +