Semiconductor & Computer Engineering
-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Difference between revisions of "amd/cores/picasso"
< amd
| Line 5: | Line 5: | ||
|developer=AMD | |developer=AMD | ||
|manufacturer=GlobalFoundries | |manufacturer=GlobalFoundries | ||
| − | |||
|isa=x86-64 | |isa=x86-64 | ||
|isa family=x86 | |isa family=x86 | ||
Revision as of 00:38, 10 December 2017
| Edit Values | |
| Picasso | |
| General Info | |
| Designer | AMD |
| Manufacturer | GlobalFoundries |
| Microarchitecture | |
| ISA | x86-64 (x86) |
| Microarchitecture | Zen |
| Word Size | 8 octets 64 bit16 nibbles |
| Process | 12 nm 0.012 μm 1.2e-5 mm |
| Technology | CMOS |
| Succession | |
Picasso is the name of the core for AMD's mainstream mobile APUs line based on the Zen CPU and Vega GPU microarchitectures succeeding Raven Ridge. Picasso processors are fabricated on GlobalFoundries 12 nm process and incorporate four cores.
See also
Facts about "Picasso - Cores - AMD"
| designer | AMD + |
| instance of | core + |
| isa | x86-64 + |
| isa family | x86 + |
| manufacturer | GlobalFoundries + |
| microarchitecture | Zen + |
| name | Picasso + |
| process | 12 nm (0.012 μm, 1.2e-5 mm) + |
| technology | CMOS + |
| word size | 64 bit (8 octets, 16 nibbles) + |
