From WikiChip
< Talk:amd

This is the discussion page for the amd/cores/picasso page.
  • Please use this page to discuss possible errors, inconsistencies, omissions, changes, and further clarifications regarding the content of amd/cores/picasso.
  • If you are looking for a particular model that's missing, please add its name to this page.

PCIe lanes[edit]

Is it 12 PCIe lanes (1x8 for GPU + 1x4 for storage) or 20 PCIe lanes (1x16 for GPU + 1x4 for storage) as does individual entries of the series insist? — Preceding unsigned comment added by (talkcontribs)

It's both, depending on if it's Socket AM4 or Socket FP5. --David (talk) 07:13, 5 August 2019 (EDT)