From WikiChip
Difference between revisions of "amd/a4/a4-9120c"
< amd

Line 1: Line 1:
 
{{amd title|A4-9120C}}
 
{{amd title|A4-9120C}}
{{chip}}
+
{{chip
 +
|name=A4-9120C
 +
|no image=Yes
 +
|designer=AMD
 +
|manufacturer=GlobalFoundries
 +
|model number=A4-9120C
 +
|part number=AM912CANN23AC
 +
|market=Mobile
 +
|first announced=January 6, 2019
 +
|first launched=January 6, 2019
 +
|family=A4
 +
|series=A4-9000
 +
|locked=Yes
 +
|frequency=1,600 MHz
 +
|turbo frequency1=2,400 MHz
 +
|clock multiplier=16
 +
|isa=x86-64
 +
|isa family=x86
 +
|microarch=Excavator
 +
|core name=Bristol Ridge
 +
|process=28 nm
 +
|technology=CMOS
 +
|word size=64 bit
 +
|core count=2
 +
|thread count=2
 +
|max cpus=1
 +
|tdp=6 W
 +
|temp min=0° C
 +
|temp max=90 °C
 +
|package name 1=amd,socket_fp4
 +
}}
 
'''A4-9120C''' is a {{arch|64}} [[dual-core]] ultra-low power [[x86]] mobile microprocessor introduced by [[AMD]] in early [[2019]]. This processor is based on AMD's {{amd|Excavator|Excavator microarchitecture|l=arch}} and is fabricated on a [[28 nm process]]. The A4-9120C operates at a base frequency of 1.6 GHz with a [[TDP]] of 6 W and a {{amd|Turbo Core|turbo}} frequency of 2.4 GHz. This APU supports single-channel DDR4-1866 memory and incorporates {{amd|Radeon R4 series}} graphics operating at up to 600 MHz.
 
'''A4-9120C''' is a {{arch|64}} [[dual-core]] ultra-low power [[x86]] mobile microprocessor introduced by [[AMD]] in early [[2019]]. This processor is based on AMD's {{amd|Excavator|Excavator microarchitecture|l=arch}} and is fabricated on a [[28 nm process]]. The A4-9120C operates at a base frequency of 1.6 GHz with a [[TDP]] of 6 W and a {{amd|Turbo Core|turbo}} frequency of 2.4 GHz. This APU supports single-channel DDR4-1866 memory and incorporates {{amd|Radeon R4 series}} graphics operating at up to 600 MHz.
  

Revision as of 19:15, 7 January 2019

Edit Values
A4-9120C
General Info
DesignerAMD
ManufacturerGlobalFoundries
Model NumberA4-9120C
Part NumberAM912CANN23AC
MarketMobile
IntroductionJanuary 6, 2019 (announced)
January 6, 2019 (launched)
ShopAmazon
General Specs
FamilyA4
SeriesA4-9000
LockedYes
Frequency1,600 MHz
Turbo Frequency2,400 MHz (1 core)
Clock multiplier16
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureExcavator
Core NameBristol Ridge
Process28 nm
TechnologyCMOS
Word Size64 bit
Cores2
Threads2
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP6 W
OP Temperature0° C – 90 °C
Packaging
Unknown package "amd,socket_fp4"

A4-9120C is a 64-bit dual-core ultra-low power x86 mobile microprocessor introduced by AMD in early 2019. This processor is based on AMD's Excavator microarchitecture and is fabricated on a 28 nm process. The A4-9120C operates at a base frequency of 1.6 GHz with a TDP of 6 W and a turbo frequency of 2.4 GHz. This APU supports single-channel DDR4-1866 memory and incorporates Radeon R4 series graphics operating at up to 600 MHz.

Cache

Main article: Excavator § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$160 KiB
163,840 B
0.156 MiB
L1I$96 KiB
98,304 B
0.0938 MiB
1x96 KiB  
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB  

L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  2x1 MiB  

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-1866
Supports ECCNo
Controllers1
Channels1
Max Bandwidth13.91 GiB/s
14,243.84 MiB/s
14.936 GB/s
14,935.749 MB/s
0.0136 TiB/s
0.0149 TB/s
Bandwidth
Single 13.91 GiB/s

Expansions

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIeRevision: 3.0
Max Lanes: 8
Configuration: 1x8
Facts about "A4-9120C - AMD"
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
A4-9120C - AMD#pcie +
base frequency1,600 MHz (1.6 GHz, 1,600,000 kHz) +
clock multiplier16 +
core count2 +
core nameBristol Ridge +
designerAMD +
familyA4 +
first announcedJanuary 6, 2019 +
first launchedJanuary 6, 2019 +
full page nameamd/a4/a4-9120c +
has ecc memory supportfalse +
has locked clock multipliertrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size160 KiB (163,840 B, 0.156 MiB) +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ size96 KiB (98,304 B, 0.0938 MiB) +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
ldateJanuary 6, 2019 +
manufacturerGlobalFoundries +
market segmentMobile +
max cpu count1 +
max memory bandwidth13.91 GiB/s (14,243.84 MiB/s, 14.936 GB/s, 14,935.749 MB/s, 0.0136 TiB/s, 0.0149 TB/s) +
max memory channels1 +
max operating temperature90 °C +
microarchitectureExcavator +
min operating temperature0° C +
model numberA4-9120C +
nameA4-9120C +
part numberAM912CANN23AC +
process28 nm (0.028 μm, 2.8e-5 mm) +
seriesA4-9000 +
smp max ways1 +
supported memory typeDDR4-1866 +
tdp6 W (6,000 mW, 0.00805 hp, 0.006 kW) +
technologyCMOS +
thread count2 +
turbo frequency (1 core)2,400 MHz (2.4 GHz, 2,400,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +