• intel
  ...er [[integrated circuit]]s including [[flash memory]], [[network interface controller]]s, [[GPU]]s, [[chipset]]s, motherboards, and computers. * {{\\|Programmable Unified Memory Architecture}} (PUMA)
  9 KB (1,150 words) - 00:03, 2 October 2022
• national semiconductor/cops ii
  The '''COP400''' or '''COPS II''' or simply '''COPS''' ('''Controller Oriented Processor System II''') was a [[microprocessor family|family]] of ...rocontrollers, one of the earliest instances of multiple CPUs in on single integrated circuit.
  6 KB (685 words) - 22:49, 5 February 2016
• intel/core i7/i7-4950hq
  | max memory = 32 GiB ...ell]] [[microarchitecture]]. This MPU includes the [[Intel Iris Pro 5200]] integrated graphic and features a large 128 MB [[L4$]] cache called {{intel|Crystal We
  4 KB (404 words) - 16:22, 13 December 2017
• intel/core i7/i7-4960hq
  | max memory = 32 GiB ...ell]] [[microarchitecture]]. This MPU includes the [[Intel Iris Pro 5200]] integrated graphic and features a large 128 MB [[L4$]] cache called {{intel|Crystal We
  3 KB (401 words) - 14:24, 12 February 2019
• intel/core i7/i7-4980hq
  | max memory = 32 GiB ...ell]] [[microarchitecture]]. This MPU includes the [[Intel Iris Pro 5200]] integrated graphic and features a large 128 MB [[L4$]] cache called {{intel|Crystal We
  3 KB (399 words) - 16:22, 13 December 2017
• intel/core i7/i7-4850hq
  | max memory = 32 GiB ...ell]] [[microarchitecture]]. This MPU includes the [[Intel Iris Pro 5200]] integrated graphic and features a large 128 MB [[L4$]] called {{intel|Crystal Well}}.
  3 KB (400 words) - 16:22, 13 December 2017
• intel/core i7/i7-4860hq
  | max memory = 32 GiB ...ell]] [[microarchitecture]]. This MPU includes the [[Intel Iris Pro 5200]] integrated graphic and features a large 128 MB [[L4$]] cache called {{intel|Crystal We
  3 KB (399 words) - 16:22, 13 December 2017
• intel/core i7/i7-4870hq
  |max memory=32 GiB ...ell]] [[microarchitecture]]. This MPU includes the [[Intel Iris Pro 5200]] integrated graphic and features a large 128 MB [[L4$]] cache called {{intel|Crystal We
  3 KB (386 words) - 09:14, 26 December 2017
• intel/core i7/i7-4750hq
  | max memory = 32 GiB ...ell]] [[microarchitecture]]. This MPU includes the [[Intel Iris Pro 5200]] integrated graphic and features a large 128 MB [[L4$]] cache called {{intel|Crystal We
  3 KB (401 words) - 16:22, 13 December 2017
• intel/core i7/i7-4760hq
  | max memory = 32 GiB ...ell]] [[microarchitecture]]. This MPU includes the [[Intel Iris Pro 5200]] integrated graphic and features a large 128 MB [[L4$]] cache called {{intel|Crystal We
  3 KB (397 words) - 16:22, 13 December 2017
• intel/core i7/i7-4770hq
  | max memory = 32 GiB ...ell]] [[microarchitecture]]. This MPU includes the [[Intel Iris Pro 5200]] integrated graphic and features the 128 MB [[L4$]] {{intel|Crystal Well}} cache.
  3 KB (398 words) - 16:22, 13 December 2017
• intel/core i7/i7-4770r
  | max memory = 32 GiB ...ell]] [[microarchitecture]]. This MPU includes the [[Intel Iris Pro 5200]] integrated graphic and features the 128 MB [[L4$]] {{intel|Crystal Well}} cache.
  4 KB (406 words) - 16:22, 13 December 2017
• intel/core i5/i5-4670r
  | max memory = 32 GiB ...ell]] [[microarchitecture]]. This MPU includes the [[Intel Iris Pro 5200]] integrated graphic and features the 128 MB [[L4$]] {{intel|Crystal Well}} cache.
  4 KB (404 words) - 16:19, 13 December 2017
• intel/core i5/i5-4570r
  | max memory = 32 GiB ...ell]] [[microarchitecture]]. This MPU includes the [[Intel Iris Pro 5200]] integrated graphic and features the 128 MB [[L4$]] {{intel|Crystal Well}} cache.
  3 KB (401 words) - 16:19, 13 December 2017
• intel/core i7/i7-4860eq
  | max memory = 32 GiB ...ell]] [[microarchitecture]]. This MPU includes the [[Intel Iris Pro 5200]] integrated graphic and features the 128 MB [[L4$]] {{intel|Crystal Well}} cache.
  3 KB (396 words) - 16:22, 13 December 2017
• intel/core i7/i7-4850eq
  | max memory = 32 GiB ...ell]] [[microarchitecture]]. This MPU includes the [[Intel Iris Pro 5200]] integrated graphic and features the 128 MB [[L4$]] {{intel|Crystal Well}} cache.
  3 KB (391 words) - 16:22, 13 December 2017
• intel/xeon e3/e3-1284l v3
  | max memory = 32 GiB ...ell]] [[microarchitecture]]. This MPU includes the [[Intel Iris Pro 5200]] integrated graphic and features the 128 MB [[L4$]] {{intel|Crystal Well}} cache.
  3 KB (399 words) - 16:27, 13 December 2017
• intel/celeron/3855u
  |max memory=32 GiB ...Hz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory.
  4 KB (596 words) - 16:15, 13 December 2017
• intel/celeron/3955u
  |max memory=32 GiB ...Hz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory.
  4 KB (596 words) - 16:15, 13 December 2017
• intel/core i3/i3-6098p
  |max memory=64 GiB ...of 1.05 GHz. This chip supports up to 64 GiB of dual-channel DDR4-2133 ECC memory.
  4 KB (627 words) - 16:17, 13 December 2017
• intel/core i5/i5-6402p
  |max memory=64 GiB ...ency of 950 MHz. This chip supports up to 64 GiB of dual-channel DDR4-2133 memory.
  4 KB (627 words) - 16:20, 13 December 2017
• intel/core i7/i7-6498du
  |max memory=32 GiB ...Hz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory.
  4 KB (640 words) - 02:21, 16 January 2019
• intel/core i5/i5-6198du
  |max memory=32 GiB ...Hz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory.
  4 KB (650 words) - 02:21, 16 January 2019
• intel/core i7/i7-5500du
  | max memory = 32 GiB | max memory addr =
  5 KB (469 words) - 16:22, 13 December 2017
• intel/core i7/i7-5950hq
  | max memory = 32 GiB {{integrated graphic
  4 KB (407 words) - 16:22, 13 December 2017
• intel/core i7/i7-5850hq
  | max memory = 32 GiB {{integrated graphic
  4 KB (401 words) - 16:22, 13 December 2017
• intel/core i7/i7-5850eq
  | max memory = 32 GiB {{integrated graphic
  4 KB (395 words) - 16:22, 13 December 2017
• intel/core i7/i7-5750hq
  | max memory = 32 GiB {{integrated graphic
  4 KB (424 words) - 16:22, 13 December 2017
• intel/core i7/i7-5775r
  | max memory = 32 GiB {{integrated graphic
  4 KB (405 words) - 16:22, 13 December 2017
• intel/core i7/i7-5775c
  |max memory=32 GiB {{integrated graphic
  4 KB (460 words) - 15:03, 24 March 2019
• intel/core i5/i5-5675r
  | max memory = 32 GiB {{integrated graphic
  4 KB (409 words) - 16:19, 13 December 2017
• intel/core i5/i5-5675c
  | max memory = 32 GiB {{integrated graphic
  4 KB (454 words) - 18:17, 2 November 2019
• intel/core i5/i5-5575r
  | max memory = 32 GiB {{integrated graphic
  4 KB (409 words) - 16:19, 13 December 2017
• intel/core i5/i5-5350h
  | max memory = 32 GiB {{integrated graphic
  4 KB (415 words) - 16:19, 13 December 2017
• intel/core i3/i3-6167u
  |max memory=32 GiB ...Hz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory. The 6167U comes with an additional 64 MiB of [[embedded DRAM]] side cache.
  4 KB (631 words) - 16:18, 13 December 2017
• intel/core i5/i5-6287u
  |max memory=32 GiB ...Hz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory. The 6287U comes with an additional 64 MiB of [[embedded DRAM]] side cache.
  4 KB (649 words) - 16:20, 13 December 2017
• baikal/baikal-t1
  | max memory = 8 GiB == Memory controller ==
  3 KB (323 words) - 16:10, 13 December 2017
• motorola/mc14500
  ...replace older relay-based [[ladder logic]] as a cheap [[programmable logic controller]]. Production continued well into the 1990s. ...esigned by Motorola. Intended to serve as a very simple programmable logic controller and replace and simplify older machinery, the MC14500 cheap price and ease
  4 KB (538 words) - 10:44, 22 May 2018
• intel/atom
  ...Poulsbo|l=chipset}} chipset which features the [[memory controller]], an [[integrated graphics]], and the various [[I/O]] ports. ...on-die, including the [[memory controller]], [[display controller]], and [[integrated graphics]]. Lincroft, along with the {{intel|Moorestown|l=platform}}, model
  17 KB (2,292 words) - 09:32, 16 July 2019
• intel/atom x7/z8750
  | max memory = 8 GiB ...end mobile system on chips. This chip supports up to 8 GiB of memory and [[integrated graphics processor|integrates]] the {{intel|HD Graphics 405}} GPU.
  4 KB (462 words) - 16:15, 13 December 2017
• intel/atom x7/z8700
  | max memory = 8 GiB ...end mobile system on chips. This chip supports up to 8 GiB of memory and [[integrated graphics processor|integrates]] the {{intel|HD Graphics (Cherry Trail)}} GP
  4 KB (472 words) - 16:15, 13 December 2017
• intel/atom x5/x5-e8000
  |max memory=8 GiB ...equency of 1.04 GHz with a burst up to 2.0 GHz and supports up to 8 GiB of memory. This chip incorporates the {{intel|HD Graphics (Braswell)}} GPU.
  4 KB (475 words) - 17:42, 27 March 2018
• intel/atom x5/x5-z8500
  | max memory = 8 GiB | max memory addr =
  5 KB (573 words) - 16:15, 13 December 2017
• intel/atom x5/x5-z8550
  | max memory = 8 GiB | max memory addr =
  5 KB (572 words) - 16:15, 13 December 2017
• intel/atom x5/x5-z8300
  | max memory = 2 GiB | max memory addr =
  6 KB (744 words) - 18:35, 14 January 2019
• intel/atom x5/x5-z8350
  |max memory=2 GiB ...equency of 1.44 GHz with a burst up to 1.92 GHz and supports up to 2 GB of memory. This chip incorporates the {{intel|HD Graphics (Cherry Trail)}} GPU.
  5 KB (736 words) - 03:44, 19 August 2023
• intel/atom x5/x5-z8330
  | max memory = 2 GiB | max memory addr =
  5 KB (558 words) - 16:15, 13 December 2017
• intel/atom x3/x3-c3130
  | max memory = 1024 MB {{integrated graphic
  4 KB (424 words) - 16:15, 13 December 2017
• intel/atom x3/x3-c3230rk
  | max memory = 2 GiB {{integrated graphic
  4 KB (449 words) - 16:15, 13 December 2017
• intel/atom x3/x3-c3445
  | max memory = 2 GiB {{integrated graphic
  4 KB (467 words) - 16:15, 13 December 2017
• intel/atom x3/x3-c3405
  | max memory = 2 GiB {{integrated graphic
  4 KB (418 words) - 16:15, 13 December 2017
• intel/atom x3/x3-c3200rk
  | max memory = 2 GiB {{integrated graphic
  4 KB (412 words) - 16:15, 13 December 2017
• intel/microarchitectures/bonnell
  === Memory Hierarchy === ...cute simultaneously such as in the case of instructions that performance a memory access along an arithmetic operation. In those instances Bonnell will issue
  38 KB (5,468 words) - 20:29, 23 May 2019
• intel/microarchitectures/silvermont
  While the previous {{intel|Atom}} architecture did away with the memory controller by integrating and other support chips on-die, it still used a Front Side B === Memory Hierarchy ===
  9 KB (1,160 words) - 09:35, 25 September 2019
• intel/pentium (2009)/j3710
  |max memory=8 GiB == Memory controller ==
  4 KB (529 words) - 17:41, 27 March 2018
• intel/pentium (2009)/n3710
  |max memory=8 GiB == Memory controller ==
  5 KB (701 words) - 17:40, 27 March 2018
• intel/pentium (2009)/n3700
  |max memory=8 GiB == Memory controller ==
  4 KB (540 words) - 17:40, 27 March 2018
• intel/celeron/n3000
  |max memory=8 GiB == Memory controller ==
  4 KB (544 words) - 17:43, 27 March 2018
• intel/celeron/n3050
  |max memory=8 GiB == Memory controller ==
  4 KB (580 words) - 09:40, 8 July 2022
• intel/celeron/n3150
  |max memory=16 GiB == Memory controller ==
  5 KB (724 words) - 06:10, 2 December 2018
• intel/celeron/n3010
  |max memory=8 GiB == Memory controller ==
  4 KB (539 words) - 17:39, 27 March 2018
• intel/celeron/n3160
  |max memory=8 GiB == Memory controller ==
  4 KB (535 words) - 17:39, 27 March 2018
• intel/celeron/n3060
  |max memory=8 GiB == Memory controller ==
  5 KB (722 words) - 01:50, 24 November 2018
• intel/celeron/j3160
  |max memory=8 GiB == Memory controller ==
  4 KB (533 words) - 17:41, 27 March 2018
• intel/celeron/j3060
  |max memory=8 GiB == Memory controller ==
  4 KB (539 words) - 17:39, 27 March 2018
• intel/xeon d/d-1540
  |max memory=128 GiB ...f 2.6 GHz. This processor supports up to 128 GiB of dual-channel DDR4-2133 memory.
  4 KB (593 words) - 02:17, 1 April 2019
• intel/xeon d/d-1520
  |max memory=128 GiB ...f 2.6 GHz. This processor supports up to 128 GiB of dual-channel DDR4-2133 memory.
  4 KB (593 words) - 02:18, 1 April 2019
• intel/xeon d/d-1518
  |max memory=128 GiB ...Hz with a TDP of 35 W and supports up to 128 GiB of dual-channel DDR4-2133 memory.
  4 KB (582 words) - 02:21, 1 April 2019
• intel/xeon d/d-1521
  |max memory=128 GiB ...f 2.7 GHz. This processor supports up to 128 GiB of dual-channel DDR4-2133 memory.
  4 KB (596 words) - 02:18, 1 April 2019
• intel/xeon d/d-1527
  |max memory=128 GiB ...f 2.7 GHz. This processor supports up to 128 GiB of dual-channel DDR4-2133 memory.
  4 KB (595 words) - 02:16, 1 April 2019
• intel/xeon d/d-1528
  |max memory=128 GiB ...f 2.5 GHz. This processor supports up to 128 GiB of dual-channel DDR4-2133 memory.
  4 KB (595 words) - 02:16, 1 April 2019
• intel/xeon d/d-1531
  |max memory=128 GiB ...f 2.7 GHz. This processor supports up to 128 GiB of dual-channel DDR4-2133 memory.
  4 KB (593 words) - 02:17, 1 April 2019
• intel/xeon d/d-1537
  |max memory=128 GiB ...f 2.3 GHz. This processor supports up to 128 GiB of dual-channel DDR4-2133 memory.
  4 KB (595 words) - 02:16, 1 April 2019
• intel/xeon d/d-1541
  |max memory=128 GiB ...f 2.7 GHz. This processor supports up to 128 GiB of dual-channel DDR4-2400 memory.
  4 KB (596 words) - 02:17, 1 April 2019
• intel/xeon d/d-1548
  |max memory=128 GiB ...f 2.6 GHz. This processor supports up to 128 GiB of dual-channel DDR4-2400 memory.
  4 KB (595 words) - 09:36, 14 May 2021
• intel/xeon d/d-1577
  |max memory=128 GiB ...f 2.1 GHz. This processor supports up to 128 GiB of dual-channel DDR4-2400 memory.
  4 KB (595 words) - 02:16, 1 April 2019
• intel/xeon d/d-1567
  |max memory=128 GiB ...f 2.7 GHz. This processor supports up to 128 GiB of dual-channel DDR4-2133 memory.
  4 KB (595 words) - 02:18, 1 April 2019
• intel/xeon d/d-1571
  |max memory=128 GiB ...f 2.1 GHz. This processor supports up to 128 GiB of dual-channel DDR4-2400 memory.
  4 KB (595 words) - 02:16, 1 April 2019
• intel/xeon d/d-1557
  |max memory=128 GiB ...f 2.1 GHz. This processor supports up to 128 GiB of dual-channel DDR4-2133 memory.
  4 KB (595 words) - 02:17, 1 April 2019
• intel/microarchitectures/haswell (client)
  * Platform Controller Hub (PCH) * Fully Integrated Voltage Regulator (FIVR)
  27 KB (3,750 words) - 06:57, 18 November 2023
• intel/core i7ee/i7-920xm
  | max memory = 8 GiB ...he chip is manufactured in [[45 nm process]]. The i7-920XM supports 8GB of memory and has a thermal design power of 55 W.
  4 KB (522 words) - 20:46, 4 October 2018
• intel/core i7ee/i7-940xm
  | max memory = 8 GiB ...he chip is manufactured in [[45 nm process]]. The i7-940XM supports 8GB of memory and has a thermal design power of 55 W.
  4 KB (537 words) - 15:01, 13 December 2019
• intel/microarchitectures/sandy bridge (client)
  ** Memory Subsystem * Integrated Graphics
  84 KB (13,075 words) - 00:54, 29 December 2020
• intel/microarchitectures/skylake (client)
  ** CSI-2 for the integrated IPU (mobile SKUs) ** Memory Subsystem
  79 KB (11,922 words) - 06:46, 11 November 2022
• intel/microarchitectures/kaby lake
  * Memory ** Faster memory for mainstream desktops (i.e., {{intel|Kaby Lake S|l=core}}) DDR4-2400 (fro
  38 KB (5,431 words) - 10:41, 8 April 2024
• intel/microarchitectures/ice lake (client)
  * Memory *** 1.5x higher memory bandwidth (60 GB/s, up from 40 GB/s)
  23 KB (3,613 words) - 12:31, 20 June 2021
• intel/core i7ee/i7-975
  | max memory = 24 GiB ...ncy of up to 3.6 GHz for a single core. This chip supports up to 24 GiB of memory and has a thermal design power of 130 W.
  4 KB (415 words) - 16:24, 13 December 2017
• intel/core i7ee/i7-965
  | max memory = 24 GiB ...cy of up to 3.47 GHz for a single core. This chip supports up to 24 GiB of memory and has a thermal design power of 130 W.
  4 KB (415 words) - 16:24, 13 December 2017
• intel/core i7ee/i7-980x
  | max memory = 24 GiB ...th a maximum turbo frequency of 3.6 GHz. This MPU supports up to 24 GiB of memory and has a thermal design power of 130 W.
  4 KB (419 words) - 16:24, 13 December 2017
• intel/core i7ee/i7-990x
  | max memory = 24 GiB ...h a maximum turbo frequency of 3.73 GHz. This MPU supports up to 24 GiB of memory and has a thermal design power of 130 W.
  4 KB (414 words) - 16:24, 13 December 2017
• intel/core i7ee/i7-3960x
  | max memory = 64 GiB ...andy Bridge}} microarchitecture, this chip supports up to 64 GiB (DDR3) of memory and has a Thermal Design Power of 130 W.
  5 KB (517 words) - 23:32, 22 September 2019
• intel/core i7ee/i7-3970x
  | max memory = 64 GiB ...andy Bridge}} microarchitecture, this chip supports up to 64 GiB (DDR3) of memory and has a Thermal Design Power of 150 W.
  4 KB (456 words) - 16:24, 13 December 2017
• intel/core i7ee/i7-4960x
  |max memory=64 GiB ...h turbo frequency of 4 GHz for a single core, this chip supports 64 GiB of memory (DDR3) and has a TDP of 130 Watts.
  4 KB (492 words) - 23:23, 12 March 2019
• intel/core i7ee/i7-5960x
  | max memory = 64 GiB ...of up to 3.5 GHz for a single core. The i7-5960X supports up to 64 GiB of memory (DDR4). This processor was eventually replaced by {{\\|i7-6950X}}, a {{inte
  5 KB (524 words) - 16:24, 13 December 2017
• intel/core i7ee/i7-6950x
  |max memory=128 GiB This processor has no integrated graphics processing unit.
  4 KB (564 words) - 14:29, 24 March 2019
• intel/core i7ee/i7-2920xm
  |max memory=32 GiB ...of 1.3 GHz. This processor supports up to 32 GiB of dual-channel DDR3-1600 memory.
  5 KB (710 words) - 16:24, 13 December 2017
• intel/core i7ee/i7-2960xm
  |max memory=32 GiB ...of 1.3 GHz. This processor supports up to 32 GiB of dual-channel DDR3-1600 memory.
  5 KB (710 words) - 03:49, 26 June 2018
• intel/core i7ee/i7-3940xm
  | max memory = 32 GiB ...ctured in [[22 nm process]] has a TDP of 55 W and supports up to 32 GiB of memory (DDR3).
  5 KB (573 words) - 16:24, 13 December 2017
• intel/core i7ee/i7-3920xm
  |max memory=32 GiB ...ctured in [[22 nm process]] has a TDP of 55 W and supports up to 32 GiB of memory (DDR3).
  4 KB (558 words) - 23:13, 12 March 2019
• intel/core i7ee/i7-4930mx
  | max memory = 32 GiB ...ctured in [[22 nm process]] has a TDP of 57 W and supports up to 32 GiB of memory (DDR3).
  5 KB (544 words) - 16:24, 13 December 2017
• intel/core i7ee/i7-4940mx
  | max memory = 32 GiB ...ctured in [[22 nm process]] has a TDP of 57 W and supports up to 32 GiB of memory (DDR3).
  5 KB (542 words) - 16:24, 13 December 2017
• intel/core i7/i7-6650u
  |max memory=32 GiB ...Hz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory. The 6650U comes with an additional 64 MiB of [[embedded DRAM]] side cache.
  4 KB (649 words) - 16:22, 13 December 2017
• intel/core i7/i7-6660u
  |max memory=32 GiB ...Hz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory. The 6660U comes with an additional 64 MiB of [[embedded DRAM]] side cache.
  4 KB (649 words) - 16:22, 13 December 2017
• intel/core i7/i7-6600u
  |max memory=32 GiB ...Hz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory.
  4 KB (654 words) - 17:22, 26 March 2018
• intel/mobile pentium ii/233
  | max memory = 64 GiB This processor has no integrated graphics processing unit.
  3 KB (316 words) - 16:25, 13 December 2017
• intel/mobile pentium ii/266
  | max memory = 64 GiB This processor has no integrated graphics processing unit.
  3 KB (319 words) - 16:25, 13 December 2017
• intel/mobile pentium ii/300
  | max memory = 64 GiB This processor has no integrated graphics processing unit.
  3 KB (313 words) - 16:25, 13 December 2017
• intel/mobile pentium ii/266pe
  | max memory = 64 GiB This processor has no integrated graphics processing unit.
  3 KB (366 words) - 16:25, 13 December 2017
• intel/mobile pentium ii/300pe
  | max memory = 64 GiB This processor has no integrated graphics processing unit.
  3 KB (360 words) - 16:25, 13 December 2017
• intel/mobile pentium ii/333
  | max memory = 64 GiB This processor has no integrated graphics processing unit.
  3 KB (320 words) - 16:25, 13 December 2017
• intel/mobile pentium ii/366
  | max memory = 64 GiB This processor has no integrated graphics processing unit.
  3 KB (309 words) - 16:25, 13 December 2017
• intel/mobile pentium ii/400
  | max memory = 64 GiB This processor has no integrated graphics processing unit.
  3 KB (345 words) - 16:25, 13 December 2017
• intel/xeon e3/e3-1280 v5
  |max memory=64 GiB ...supports up to 64 GiB of dual-channel DDR4-2133 memory. This MPU has no [[integrated graphics processor]].
  3 KB (485 words) - 00:29, 7 April 2018
• intel/xeon e3/e3-1275 v5
  |max memory=64 GiB ...al-channel DDR4-2133 memory. This MPU has the {{intel|HD Graphics P530}} [[integrated graphics processor|IGP]].
  4 KB (620 words) - 00:27, 7 April 2018
• intel/xeon e3/e3-1270 v5
  |max memory=64 GiB ...supports up to 64 GiB of dual-channel DDR4-2133 memory. This MPU has no [[integrated graphics processor]].
  3 KB (490 words) - 00:29, 7 April 2018
• intel/xeon e3/e3-1260l v5
  |max memory=64 GiB ...supports up to 64 GiB of dual-channel DDR4-2133 memory. This MPU has no [[integrated graphics processor]].
  3 KB (489 words) - 16:26, 13 December 2017
• intel/xeon e3/e3-1245 v5
  |max memory=64 GiB ...al-channel DDR4-2133 memory. This MPU has the {{intel|HD Graphics P530}} [[integrated graphics processor|IGP]].
  4 KB (609 words) - 00:29, 7 April 2018
• intel/xeon e3/e3-1240l v5
  |max memory=64 GiB ...supports up to 64 GiB of dual-channel DDR4-2133 memory. This MPU has no [[integrated graphics processor]].
  3 KB (484 words) - 16:26, 13 December 2017
• intel/xeon e3/e3-1240 v5
  |max memory=64 GiB ...supports up to 64 GiB of dual-channel DDR4-2133 memory. This MPU has no [[integrated graphics processor]].
  3 KB (490 words) - 00:29, 7 April 2018
• intel/xeon e3/e3-1235l v5
  |max memory=64 GiB ...al-channel DDR4-2133 memory. This MPU has the {{intel|HD Graphics P530}} [[integrated graphics processor|IGP]].
  4 KB (608 words) - 16:26, 13 December 2017
• intel/xeon e3/e3-1230 v5
  |max memory=64 GiB ...supports up to 64 GiB of dual-channel DDR4-2133 memory. This MPU has no [[integrated graphics processor]].
  3 KB (506 words) - 00:29, 7 April 2018
• intel/xeon e3/e3-1225 v5
  |max memory=64 GiB ...al-channel DDR4-2133 memory. This MPU has the {{intel|HD Graphics P530}} [[integrated graphics processor|IGP]].
  4 KB (620 words) - 00:24, 7 April 2018
• intel/xeon e3/e3-1220 v5
  |max memory=64 GiB ...supports up to 64 GiB of dual-channel DDR4-2133 memory. This MPU has no [[integrated graphics processor]].
  3 KB (490 words) - 00:29, 7 April 2018
• intel/xeon e3/e3-1268l v5
  |max memory=64 GiB ...al-channel DDR4-2133 memory. This MPU has the {{intel|HD Graphics P530}} [[integrated graphics processor|IGP]] underclocked to 350 MHz.
  4 KB (624 words) - 00:27, 7 April 2018
• intel/xeon e3/e3-1535m v5
  |max memory=64 GiB ...ency of 1.05 GHz. This model supports 64 GiB of dual-channel DDR4-2133 ECC memory.
  4 KB (648 words) - 16:27, 13 December 2017
• intel/xeon e3/e3-1505m v5
  |max memory=64 GiB ...ency of 1.05 GHz. This model supports 64 GiB of dual-channel DDR4-2133 ECC memory.
  4 KB (646 words) - 05:24, 14 July 2018
• intel/xeon e3/e3-1575m v5
  |max memory=64 GiB ...RAM]] on-package. This model supports 64 GiB of dual-channel DDR4-2133 ECC memory.
  4 KB (654 words) - 16:27, 13 December 2017
• intel/xeon e3/e3-1545m v5
  |max memory=64 GiB ...RAM]] on-package. This model supports 64 GiB of dual-channel DDR4-2133 ECC memory.
  4 KB (654 words) - 16:27, 13 December 2017
• intel/xeon e3/e3-1515m v5
  |max memory=64 GiB ...RAM]] on-package. This model supports 64 GiB of dual-channel DDR4-2133 ECC memory.
  4 KB (663 words) - 16:27, 13 December 2017
• intel/xeon e3/e3-1505l v5
  |max memory=64 GiB ...equency of 1 GHz. This model supports 64 GiB of dual-channel DDR4-2133 ECC memory.
  4 KB (640 words) - 16:27, 13 December 2017
• intel/pentium (2009)/g4520
  |max memory=64 GiB ...of 1.05 GHz. This chip supports up to 64 GiB of dual-channel DDR4-2133 ECC memory.
  4 KB (607 words) - 16:25, 13 December 2017
• intel/pentium (2009)/g4500t
  |max memory=64 GiB ...of 950 MHz. This chip supports up to 64 GiB of dual-channel DDR4-2133 ECC memory.
  4 KB (610 words) - 16:25, 13 December 2017
• intel/pentium (2009)/g4500
  |max memory=64 GiB ...of 1.05 GHz. This chip supports up to 64 GiB of dual-channel DDR4-2133 ECC memory.
  4 KB (616 words) - 16:25, 13 December 2017
• intel/pentium (2009)/g4400
  |max memory=64 GiB ...cy of 1 GHz. This chip supports up to 64 GiB of dual-channel DDR4-2133 ECC memory.
  4 KB (623 words) - 06:18, 5 November 2020
• intel/pentium (2009)/g4400t
  |max memory=64 GiB ...of 950 MHz. This chip supports up to 64 GiB of dual-channel DDR4-2133 ECC memory.
  4 KB (610 words) - 16:25, 13 December 2017
• intel/pentium (2009)/g4400te
  |max memory=64 GiB ...of 950 MHz. This chip supports up to 64 GiB of dual-channel DDR4-2133 ECC memory.
  4 KB (606 words) - 16:25, 13 December 2017
• intel/pentium (2009)/4405y
  |max memory=16 GiB ...ating at up to 800 MHz and supports up to 16 GiB of dual-channel DDR3-1866 memory.
  4 KB (581 words) - 17:57, 28 August 2018
• intel/pentium (2009)/4405u
  |max memory=32 GiB ...Hz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory.
  4 KB (597 words) - 16:25, 13 December 2017
• intel/xeon d/d-1529
  |max memory=128 GiB ...GHz with a TDP of 20 W supporting up to 128 GiB of dual-channel DDR4-1600 memory.
  4 KB (613 words) - 02:20, 1 April 2019
• intel/xeon d/d-1539
  |max memory=128 GiB ...f 2.2 GHz. This processor supports up to 128 GiB of dual-channel DDR4-2133 memory.
  4 KB (596 words) - 02:16, 1 April 2019
• intel/xeon d/d-1559
  |max memory=128 GiB ...f 2.1 GHz. This processor supports up to 128 GiB of dual-channel DDR4-2133 memory.
  4 KB (596 words) - 02:16, 1 April 2019
• intel/core m
  Core M dies are packaged with the {{intel|Platform Controller Hub}} (PCH) die in the same packaging which is only about 1 mm thick and re |?max memory#GB
  7 KB (949 words) - 20:01, 8 August 2018
• intel/core m/5y71
  | max memory = 16 GiB {{integrated graphic
  6 KB (626 words) - 19:52, 6 October 2020
• intel/core m/5y70
  | max memory = 16 GiB {{integrated graphic
  6 KB (603 words) - 16:24, 13 December 2017
• intel/core m/5y10
  | max memory = 16 GiB {{integrated graphic
  6 KB (601 words) - 16:24, 13 December 2017
• intel/core m/5y10a
  | max memory = 16 GiB {{integrated graphic
  6 KB (603 words) - 16:24, 13 December 2017
• intel/core m/5y51
  | max memory = 16 GiB {{integrated graphic
  6 KB (623 words) - 16:24, 13 December 2017
• intel/core m/5y31
  | max memory = 16 GiB {{integrated graphic
  6 KB (623 words) - 16:24, 13 December 2017
• intel/core m/5y10c
  | max memory = 16 GiB {{integrated graphic
  6 KB (627 words) - 16:24, 13 December 2017
• intel/core m/m7-6y75
  |max memory=16 GiB == Memory controller ==
  4 KB (613 words) - 17:58, 28 August 2018
• intel/core m/m5-6y54
  |max memory=16 GiB == Memory controller ==
  4 KB (613 words) - 17:58, 28 August 2018
• intel/core m/m5-6y57
  |max memory=16 GiB == Memory controller ==
  4 KB (613 words) - 17:58, 28 August 2018
• intel/core m/m3-6y30
  |max memory=16 GiB == Memory controller ==
  4 KB (613 words) - 17:58, 28 August 2018
• intel/core i3/i3-6100u
  |max memory=32 GiB ...Hz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory.
  4 KB (616 words) - 16:17, 13 December 2017
• intel/core i3/i3-6300
  |max memory=64 GiB ...of 1.15 GHz. This chip supports up to 64 GiB of dual-channel DDR4-2133 ECC memory.
  4 KB (609 words) - 16:18, 13 December 2017
• intel/core i3/i3-6300t
  |max memory=64 GiB ...of 950 MHz. This chip supports up to 64 GiB of dual-channel DDR4-2133 ECC memory.
  4 KB (618 words) - 16:18, 13 December 2017
• intel/core i3/i3-6100te
  |max memory=64 GiB ...cy of 1 GHz. This chip supports up to 64 GiB of dual-channel DDR4-2133 ECC memory.
  4 KB (612 words) - 16:17, 13 December 2017
• intel/core i3/i3-6320
  |max memory=64 GiB ...of 1.15 GHz. This chip supports up to 64 GiB of dual-channel DDR4-2133 ECC memory.
  4 KB (611 words) - 16:18, 13 December 2017
• intel/core i3/i3-6100
  |max memory=64 GiB ...of 1.05 GHz. This chip supports up to 64 GiB of dual-channel DDR4-2133 ECC memory.
  4 KB (615 words) - 16:17, 13 December 2017
• intel/core i3/i3-6100t
  |max memory=64 GiB ...of 950 MHz. This chip supports up to 64 GiB of dual-channel DDR4-2133 ECC memory.
  4 KB (615 words) - 16:17, 13 December 2017
• intel/core i3/i3-6102e
  |max memory=64 GiB ...uency of 950 MHz. This model supports 64 GiB of dual-channel DDR4-2133 ECC memory.
  4 KB (613 words) - 16:17, 13 December 2017
• intel/core i3/i3-6100h
  |max memory=64 GiB ...frequency of 900 MHz. This model supports 64 GiB of dual-channel DDR4-2133 memory.
  4 KB (613 words) - 02:11, 16 January 2019
• intel/core i3/i3-6100e
  |max memory=64 GiB ...uency of 950 MHz. This model supports 64 GiB of dual-channel DDR4-2133 ECC memory.
  4 KB (613 words) - 16:17, 13 December 2017
• intel/core i3/6320t
  |max memory=64 GiB ...of 950 MHz. This chip supports up to 64 GiB of dual-channel DDR4-2133 ECC memory.
  4 KB (609 words) - 16:16, 13 December 2017
• intel/core i3/6120t
  |max memory=64 GiB ...of 950 MHz. This chip supports up to 64 GiB of dual-channel DDR4-2133 ECC memory.
  4 KB (606 words) - 16:16, 13 December 2017
• amd/am286zx-lx
  | arch = 80286 and PC-AT integrated on chip ...hitecture designed by [[AMD]] and introduced in late [[1990]]. These chips integrated the [[CMOS]] core from the {{amd|Am286}} family along with all the logic fu
  5 KB (750 words) - 21:22, 24 May 2016
• amd/am286zx-lx/ng286lx-12
  | max memory = 16 MiB | max memory addr = 0xFFFFFF
  3 KB (339 words) - 15:18, 13 December 2017
• amd/am286zx-lx/ng286lx-16
  | max memory = 16 MiB | max memory addr = 0xFFFFFF
  3 KB (339 words) - 15:18, 13 December 2017
• amd/am286zx-lx/ng286zx-12
  | max memory = 16 MiB | max memory addr = 0xFFFFFF
  3 KB (309 words) - 15:18, 13 December 2017
• amd/am286zx-lx/ng286zx-16
  | max memory = 16 MiB | max memory addr = 0xFFFFFF
  3 KB (309 words) - 15:18, 13 December 2017
• amd/am186/a80186
  | max memory = 1 MiB | max memory addr =
  3 KB (269 words) - 15:17, 13 December 2017
• amd/am186/a80186-10
  | max memory = 1 MiB | max memory addr =
  3 KB (255 words) - 15:17, 13 December 2017
• amd/am186/ia80186
  | max memory = 1 MiB | max memory addr =
  3 KB (271 words) - 15:17, 13 December 2017
• amd/am186/r80186
  | max memory = 1 MiB | max memory addr =
  3 KB (263 words) - 15:17, 13 December 2017
• amd/am186/r80186-10
  | max memory = 1 MiB | max memory addr =
  3 KB (255 words) - 15:17, 13 December 2017
• amd/am186/ir80186
  | max memory = 1 MiB | max memory addr =
  3 KB (265 words) - 15:17, 13 December 2017
• amd/am186/n80186
  | max memory = 1 MiB | max memory addr =
  3 KB (256 words) - 15:17, 13 December 2017
• amd/am186/n80186-10
  | max memory = 1 MiB | max memory addr =
  3 KB (258 words) - 15:17, 13 December 2017
• amd/am186/j80186-6
  | max memory = 1 MiB | max memory addr =
  3 KB (267 words) - 15:17, 13 December 2017
• amd/am186/j80186-3
  | max memory = 1 MiB | max memory addr =
  3 KB (267 words) - 15:17, 13 December 2017
• amd/am186/j80186-1
  | max memory = 1 MiB | max memory addr =
  3 KB (267 words) - 15:17, 13 December 2017
• amd/am186/c80186-1
  | max memory = 1 MiB | max memory addr =
  3 KB (267 words) - 15:17, 13 December 2017
• amd/am186/c80186-3
  | max memory = 1 MiB | max memory addr =
  3 KB (267 words) - 15:17, 13 December 2017
• amd/am186/c80186-6
  | max memory = 1 MiB | max memory addr =
  3 KB (267 words) - 15:17, 13 December 2017
• amd/am186/cg80186-6
  | max memory = 1 MiB | max memory addr =
  3 KB (261 words) - 15:17, 13 December 2017
• amd/am186/cg80186-3
  | max memory = 1 MiB | max memory addr =
  3 KB (264 words) - 15:17, 13 December 2017
• amd/am186/ic80186-3
  | max memory = 1 MiB | max memory addr =
  3 KB (277 words) - 15:17, 13 December 2017
• amd/am186/ic80186-6
  | max memory = 1 MiB | max memory addr =
  3 KB (277 words) - 15:17, 13 December 2017
• amd/am186/ig80186-3
  | max memory = 1 MiB | max memory addr =
  3 KB (278 words) - 15:17, 13 December 2017
• amd/am186/ig80186-6
  | max memory = 1 MiB | max memory addr =
  3 KB (278 words) - 15:17, 13 December 2017
• amd/am186/n80c186
  | max memory = 1 MiB | max memory addr =
  3 KB (280 words) - 04:32, 22 October 2019
• amd/am186/n80c186-12
  | max memory = 1 MiB | max memory addr =
  3 KB (281 words) - 15:17, 13 December 2017
• amd/am186/n80c186-16
  | max memory = 1 MiB | max memory addr =
  3 KB (286 words) - 15:17, 13 December 2017
• amd/am186/n80c186-20
  | max memory = 1 MiB | max memory addr =
  3 KB (281 words) - 15:17, 13 December 2017
• amd/am186/n80c186-25
  | max memory = 1 MiB | max memory addr =
  3 KB (281 words) - 15:17, 13 December 2017
• amd/am186/in80c186
  | max memory = 1 MiB | max memory addr =
  3 KB (290 words) - 15:17, 13 December 2017
• amd/am186/in80c186-12
  | max memory = 1 MiB | max memory addr =
  3 KB (296 words) - 15:17, 13 December 2017
• amd/am186/in80c186-16
  | max memory = 1 MiB | max memory addr =
  3 KB (296 words) - 15:17, 13 December 2017
• amd/am186/in80c186-20
  | max memory = 1 MiB | max memory addr =
  3 KB (296 words) - 15:17, 13 December 2017
• amd/am186/s80c186
  | max memory = 1 MiB | max memory addr =
  3 KB (279 words) - 15:17, 13 December 2017
• amd/am186/s80c186-12
  | max memory = 1 MiB | max memory addr =
  3 KB (284 words) - 15:17, 13 December 2017
• amd/am186/s80c186-16
  | max memory = 1 MiB | max memory addr =
  3 KB (284 words) - 15:17, 13 December 2017
• amd/am186/s80c186-20
  | max memory = 1 MiB | max memory addr =
  3 KB (284 words) - 15:17, 13 December 2017
• amd/am186/s80c186-25
  | max memory = 1 MiB | max memory addr =
  3 KB (284 words) - 15:17, 13 December 2017
• amd/am186/sb80c186
  | max memory = 1 MiB | max memory addr =
  3 KB (279 words) - 15:17, 13 December 2017
• amd/am186/sb80c186-12
  | max memory = 1 MiB | max memory addr =
  3 KB (284 words) - 15:17, 13 December 2017
• amd/am186/sb80c186-16
  | max memory = 1 MiB | max memory addr =
  3 KB (284 words) - 15:17, 13 December 2017
• amd/am186/sb80c186-20
  | max memory = 1 MiB | max memory addr =
  3 KB (284 words) - 15:17, 13 December 2017
• amd/am186/sb80c186-25
  | max memory = 1 MiB | max memory addr =
  3 KB (284 words) - 15:17, 13 December 2017
• amd/am186/80186-buc
  | max memory = 1 MiB | max memory addr =
  3 KB (269 words) - 15:17, 13 December 2017
• amd/am186/80186-6-buc
  | max memory = 1 MiB | max memory addr =
  3 KB (275 words) - 15:16, 13 December 2017
• amd/am186/80186-bzc
  | max memory = 1 MiB | max memory addr =
  3 KB (269 words) - 15:17, 13 December 2017
• amd/am186/80186-6-bzc
  | max memory = 1 MiB | max memory addr =
  3 KB (275 words) - 15:17, 13 December 2017
• amd/am186/mr80186-3
  | max memory = 1 MiB | max memory addr =
  3 KB (260 words) - 15:17, 13 December 2017
• amd/am186/mr80186-6
  | max memory = 1 MiB | max memory addr =
  3 KB (260 words) - 15:17, 13 December 2017
• amd/am186/mg80186-3
  | max memory = 1 MiB | max memory addr =
  3 KB (260 words) - 15:17, 13 December 2017
• amd/am186/mg80186-6
  | max memory = 1 MiB | max memory addr =
  3 KB (260 words) - 15:17, 13 December 2017
• amd/am186/r80186-6
  | max memory = 1 MiB | max memory addr =
  3 KB (250 words) - 15:17, 13 December 2017
• amd/am186ex
  | arch = Am186 core with memory and additional controllers |?max memory#MB
  9 KB (1,276 words) - 16:07, 28 June 2016
• amd/am186ex/am186em–20vc\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer.
  3 KB (319 words) - 16:55, 30 June 2017
• amd/am186ex/am186em–25vc\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer.
  3 KB (319 words) - 16:56, 30 June 2017
• amd/am186ex/am186em–33vc\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer.
  3 KB (319 words) - 16:56, 30 June 2017
• amd/am186ex/am186em–40vc\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer.
  3 KB (319 words) - 16:56, 30 June 2017
• amd/am186ex/am186emlv–20vc\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer. This is a low-voltage version of the {{\\|Am18
  3 KB (330 words) - 16:54, 30 June 2017
• amd/am186ex/am186emlv–25vc\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer. This is a low-voltage version of the {{\\|Am18
  3 KB (330 words) - 16:55, 30 June 2017
• amd/am186ex/am186em–20kc\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer.
  3 KB (319 words) - 16:55, 30 June 2017
• amd/am186ex/am186em–25kc\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer.
  3 KB (319 words) - 16:55, 30 June 2017
• amd/am186ex/am186em–33kc\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer.
  3 KB (319 words) - 16:56, 30 June 2017
• amd/am186ex/am186em–40kc\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer.
  3 KB (319 words) - 16:56, 30 June 2017
• amd/am186ex/am186em–20ki\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer. This model supports industrial temperature ran
  3 KB (329 words) - 16:55, 30 June 2017
• amd/am186ex/am186em–25ki\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer. This model supports industrial temperature ran
  3 KB (329 words) - 16:56, 30 June 2017
• amd/am186ex/am186emlv–20kc\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer. This model is a low-voltage version of the {{\
  3 KB (330 words) - 16:54, 30 June 2017
• amd/am186ex/am186emlv–25kc\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer. This model is a low-voltage version of the {{\
  3 KB (330 words) - 16:55, 30 June 2017
• amd/am186ex/am186es–20vc\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer. As with the rest of the {{amd|Am186ES}} series
  4 KB (387 words) - 17:00, 30 June 2017
• amd/am186ex/am186es–25vc\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer. As with the rest of the {{amd|Am186ES}} series
  4 KB (387 words) - 17:01, 30 June 2017
• amd/am186ex/am186es–33vc\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer. As with the rest of the {{amd|Am186ES}} series
  4 KB (387 words) - 17:01, 30 June 2017
• amd/am186ex/am186es–40vc\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer. As with the rest of the {{amd|Am186ES}} series
  4 KB (387 words) - 17:01, 30 June 2017
• amd/am186ex/am186eslv–20vc\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer. As with the rest of the {{amd|Am186ES}} series
  4 KB (402 words) - 16:59, 30 June 2017
• amd/am186ex/am186eslv–25vc\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer. As with the rest of the {{amd|Am186ES}} series
  4 KB (402 words) - 17:00, 30 June 2017
• amd/am186ex/am186es–20kc\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer. As with the rest of the {{amd|Am186ES}} series
  4 KB (387 words) - 17:00, 30 June 2017
• amd/am186ex/am186es–25kc\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer. As with the rest of the {{amd|Am186ES}} series
  4 KB (387 words) - 17:00, 30 June 2017
• amd/am186ex/am186es–33kc\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer. As with the rest of the {{amd|Am186ES}} series
  4 KB (387 words) - 17:01, 30 June 2017
• amd/am186ex/am186es–40kc\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer. As with the rest of the {{amd|Am186ES}} series
  4 KB (387 words) - 17:01, 30 June 2017
• amd/am186ex/am186es–20ki\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer. As with the rest of the {{amd|Am186ES}} series
  4 KB (397 words) - 17:00, 30 June 2017
• amd/am186ex/am186es–25ki\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer. As with the rest of the {{amd|Am186ES}} series
  4 KB (397 words) - 17:01, 30 June 2017
• amd/am186ex/am186eslv–20kc\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer. As with the rest of the {{amd|Am186ES}} series
  4 KB (400 words) - 16:59, 30 June 2017
• amd/am186ex/am186eslv–25kc\w
  | max memory = 1 MiB ...hip included many other features such as 32 general purpose I/O lines, DMA controller, UART, and a watchdog timer. As with the rest of the {{amd|Am186ES}} series
  4 KB (400 words) - 17:00, 30 June 2017
• amd/am186ex/am186ed–20vc\w
  | max memory = 1 MiB ...t of the {{amd|Am186ED}} series, this MCU incorporates a programmable DRAM controller as well as all the features of the {{amd|Am186ES}} series.
  3 KB (351 words) - 16:53, 30 June 2017
• amd/am186ex/am186ed–25vc\w
  | max memory = 1 MiB ...t of the {{amd|Am186ED}} series, this MCU incorporates a programmable DRAM controller as well as all the features of the {{amd|Am186ES}} series.
  3 KB (351 words) - 16:53, 30 June 2017
• amd/am186ex/am186ed–33vc\w
  | max memory = 1 MiB ...t of the {{amd|Am186ED}} series, this MCU incorporates a programmable DRAM controller as well as all the features of the {{amd|Am186ES}} series.
  3 KB (351 words) - 16:54, 30 June 2017

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