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PipeRench
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General Info
Designer	Carnegie Mellon University
Introduction	April, 2000 (announced) 2002 (launched)
General Specs
Frequency	120 MHz
Bus speed	60 MHz
Clock multiplier	2
Microarchitecture
Process	180 nm
Transistors	3,650,000
Technology	CMOS
Die	49 mm²
Electrical
Power dissipation	4 W

PipeRench was a research microprocessor designed at Carnegie Mellon University in the early 2000s. PipeRench was developed with a reconfigurable pipeline. This allows what would otherwise have to be implemented as specialized embedded chips to be implemented in a more generic way using PipeRench through reconfiguration.

Technology developed for this project was eventually leased to Rapport for their Kilocore architecture which eventually resulted in the KC256, a 256-core chip.

Architecture

PipeRench is designed as a reconfigurable fabric. The chip breaks down each of its pipeline stages into individual stripes. Each strip has a set of simple execution units (EU/PE), register files, and a interconnection network. By configuring each of the stripes using the interconnect network, it's possible to virtualize different kind of custom hardware. The ALU, for example contains additional circuitry to facilitate bit-slicing.

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Die Shot

49 mm² on a 180 nm process.

Documents

• Seth C. Goldstein, Herman Schmit, Mihai Budiu, Srihari Cadambi, Matt Moe, and R. Reed Taylor, "PipeRench: A Reconfigurable Architecture and Compiler", April 2000, Carnegie Mellon University Computer Science Department.

External links

• Official Website