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Rocket Lake µarch
General Info
Arch Type	APU
Designer	Intel
Manufacturer	Intel
Process	14 nm
Core Configs	4, 6, 8
Pipeline
Type	Superscalar, Superpipeline
OoOE	Yes
Speculative	Yes
Reg Renaming	Yes
Stages	14-19
Decode	5-way
Instructions
ISA	x86-64
Extensions	MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA3, F16C, BMI, BMI2, VT-x, VT-d, TXT, TSX, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVE, SGX, MPX
Cache
L1I Cache	48 KiB/core 8-way set associative
L1D Cache	32 KiB/core 8-way set associative
L2 Cache	512 KiB/core 4-way set associative
L3 Cache	2 MiB/core Up to 16-way set associative
L4 Cache	128 MiB/package on Iris Pro GPUs only
Cores
Core Names	Cypress Cove
Succession
Comet Lake Alder Lake
Contemporary
Tiger Lake

Rocket Lake (RKL) is a planned microarchitecture designed by Intel as a successor to Comet Lake for desktops and high-performance mobile devices.

Codenames

Core	Description	Graphics	Target
Rocket Lake S	Mainstream performance	GT2	Desktop performance to value, AiOs, and minis
Rocket Lake U	Ultra-low power	GT2	Light notebooks, portable All-in-Ones (AiOs), Minis, and conference room

Brands

Intel is expected to release Rocket Lake under 3 main brand families:

Logo	Family	General Description	Differentiating Features
			Cores	HT	AVX	AVX2	TBT	ECC
	Core i3	Low-end Performance
	Core i5	Mid-range Performance
	Core i7	High-end Performance

Release Dates

Rocket Lake is expected to be released in Q1 2021.

Compatibility

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Rocket Lake will feature the same LGA1200 socket as Comet Lake. Rocket Lake is backwards compatible with Comet Lake. Rocket Lake will have new motherboards and a new 500 series chipset. Rocket Lake will not be compatible with Alder Lake.

Compiler support

Compiler	Arch-Specific	Arch-Favorable
ICC	-march=?	-mtune=?
GCC	-march=?	-mtune=?
LLVM	-march=?	-mtune=?
Visual Studio	/arch:AVX2	/?

CPUID

Further information: Intel CPUIDs

Core	Extended Family	Family	Extended Model	Model	Stepping
S	0	0x6	0xA	0x7	0x0-0x1
	Family 6 Model 167 Stepping 0-1 Stepping: A0=0, B0=1

Architecture

Key changes from Comet Lake

Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release.

• Core
  • Skylake ➡ Cypress Cove

• GPU
  • Gen 9.5 ➡ Gen12 (Xe)
  • 32 EUs up from 24 EUs

• Display
  • DisplayPort 1.4a (from DisplayPort 1.2)
  • HDMI 2.0b (from HDMI 1.4b)

• I/O
  • PCIe 4.0 (from 3.0)

• Memory
  • Faster memory for mainstream desktops (i.e., Rocket Lake S) DDR4-3200 (from DDR4-2933)

• Chipset
  • 400 Series chipset → 500 Series chipset
    • 2.5G Ethernet (Foxville) support
    • Integrated WiFi 6 AX201 (GiG+) support via CNVi

• Packaging
  • Die thinning on top-end SKUs for better heat removal