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Celeron G4950 - Intel
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Celeron G4950
coffee lake s (front).png
General Info
DesignerIntel
ManufacturerIntel
Model NumberG4950
MarketDesktop
ShopAmazon
General Specs
FamilyCeleron
Series4000
LockedYes
Bus typeDMI 3.0
Bus rate4 × 8 GT/s
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureCoffee Lake
PlatformCoffee Lake
Chipset300 series
Core NameCoffee Lake S
Core Family6
Core Model158
Process14 nm
TechnologyCMOS
Die126 mm²
Word Size64 bit
Cores2
Threads2
Max Memory64 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP54 W
Tjunction0 °C – 100 °C
Packaging
PackageFCLGA-1151 (LGA)
FC-LGA14C		FCLGA-1151.svg
Dimension37.5 mm x 37.5 mm x 4.4 mm
Pitch0.914 mm
Contacts1151
SocketLGA-1151

Celeron G4950 is a 64-bit dual-core budget x86 desktop microprocessor introduced by Intel in early 2019. The G4950, which is based on the Coffee Lake microarchitecture, is fabricated on Intel's improved 14nm++ process. This processor operates at 3.2 GHz with a TDP of 35 W and supports up to 64 GiB of dual-channel DDR4-2400 ECC memory. Additionally the G4950 incorporates Intel's UHD Graphics 610 IGP operating at 350 MHz with a burst frequency of 1.05 GHz.


Cache

Main article: Coffee Lake § Cache

[Edit/Modify Cache Info]

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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back
L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  2x256 KiB4-way set associativewrite-back
L3$2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
  2x1 MiB8-way set associativewrite-back

Memory controller

[Edit/Modify Memory Info]

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Integrated Memory Controller
Max TypeDDR4-2400
Supports ECCYes
Max Mem64 GiB
Controllers1
Channels2
Max Bandwidth35.76 GiB/s
36,618.24 MiB/s
38.397 GB/s
38,397.008 MB/s
0.0349 TiB/s
0.0384 TB/s
Bandwidth
Single 17.88 GiB/s
Double 35.76 GiB/s

Expansions

[Edit/Modify Expansions Info]

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Expansion Options
PCIeRevision: 3.0
Max Lanes: 16
Configuration: 1x16, 2x8, 1x8+2x4


Graphics

[Edit/Modify IGP Info]

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Integrated Graphics Information
GPUUHD Graphics 610
DesignerIntelDevice ID0x3E93
Max Displays3
Max Memory64 GiB
65,536 MiB
67,108,864 KiB
68,719,476,736 B
Frequency350 MHz
0.35 GHz
350,000 KHz
Burst Frequency? MHz
"? MHz" is not a number.
OutputDP, eDP, HDMI, DVI
Max Resolution
HDMI4096x2304 @24 Hz
DP4096x2304 @60 Hz
eDP4096x2304 @60 Hz
Standards
DirectX12
OpenGL4.5
OpenCL2.0
DP1.2
eDP1.4
HDMI1.4a
Additional Features
Intel Quick Sync Video
Intel InTru 3D
Intel Clear Video
Intel Clear Video HD

Features

[Edit/Modify Supported Features]

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Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
EISTEnhanced SpeedStep Technology
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
MPXMemory Protection Extensions
SGXSoftware Guard Extensions
Secure KeySecure Key Technology
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/celeron/g4950&oldid=89802"
Facts about "Celeron G4950 - Intel"
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Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Celeron G4950 - Intel#package + and Celeron G4950 - Intel#pcie +
bus links4 +
bus rate8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus typeDMI 3.0 +
chipset300 series +
core count2 +
core family6 +
core model158 +
core nameCoffee Lake S +
designerIntel +
device id0x3E93 +
die area126 mm² (0.195 in², 1.26 cm², 126,000,000 µm²) +
familyCeleron +
full page nameintel/celeron/g4950 +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Memory Protection Extensions +, Software Guard Extensions + and Secure Key Technology +
has intel enhanced speedstep technologytrue +
has intel secure key technologytrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
integrated gpuUHD Graphics 610 +
integrated gpu base frequency350 MHz (0.35 GHz, 350,000 KHz) +
integrated gpu designerIntel +
integrated gpu max memory65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB) +
isax86-64 +
isa familyx86 +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description4-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ description8-way set associative +
l3$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
ldate3000 +
main imageFile:coffee lake s (front).png +
manufacturerIntel +
market segmentDesktop +
max cpu count1 +
max junction temperature373.15 K (100 °C, 212 °F, 671.67 °R) +
max memory65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) +
max memory bandwidth35.76 GiB/s (36,618.24 MiB/s, 38.397 GB/s, 38,397.008 MB/s, 0.0349 TiB/s, 0.0384 TB/s) +
max memory channels2 +
microarchitectureCoffee Lake +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
model numberG4950 +
nameCeleron G4950 +
packageFCLGA-1151 +
platformCoffee Lake +
process14 nm (0.014 μm, 1.4e-5 mm) +
series4000 +
smp max ways1 +
socketLGA-1151 +
supported memory typeDDR4-2400 +
tdp54 W (54,000 mW, 0.0724 hp, 0.054 kW) +
technologyCMOS +
thread count2 +
word size64 bit (8 octets, 16 nibbles) +
x86/has memory protection extensionstrue +
x86/has software guard extensionstrue +