From WikiChip
MT6595 - MediaTek
Edit Values | |
![]() | |
General Info | |
Microarchitecture |
MT6595 is a mid-range octa-core ARM LTE SoC designed by MediaTek and introduced in early 2014. This chip, which is fabricated on TSMC's 28 nm process, features four big Cortex-A17 cores operating at up to 2.5 GHz and four little Cortex-A7 cores operating at up to 1.7 GHz. The MT6595 incorporates an PowerVR G6200 GPU operating at up to 600 MHz and supports up to dual-channel LPDDR3-1866 memory.
Die
- TSMC 28 nm process
- 89 mm² die size
- Quad-core Cortex-A7
- ~0.48 mm² per core
- Quad-core Cortex-A17 + 2 MiB L2
- ~1.93 mm² per core
- ~3.93 mm² for 2 MiB L2
(small quad-core is unlabeled below the big core cluster)
Facts about "MT6595 - MediaTek"
base frequency | 2,500 MHz (2.5 GHz, 2,500,000 kHz) + and 1,700 MHz (1.7 GHz, 1,700,000 kHz) + |
core count | 8 + |
core name | Cortex-A17 + and Cortex-A7 + |
designer | MediaTek + and ARM Holdings + |
die area | 89 mm² (0.138 in², 0.89 cm², 89,000,000 µm²) + |
family | MT65xx + |
first announced | November 2014 + |
first launched | November 2014 + |
full page name | mediatek/mt65xx/mt6595 + |
instance of | microprocessor + |
isa | ARMv7 + |
isa family | ARM + |
ldate | November 2014 + |
manufacturer | TSMC + |
market segment | Mobile + |
max cpu count | 1 + |
microarchitecture | Cortex-A17 + and Cortex-A7 + |
model number | MT6595 + |
name | MT6595 + |
part number | MT6595 + |
process | 28 nm (0.028 μm, 2.8e-5 mm) + |
smp max ways | 1 + |
technology | CMOS + |
thread count | 8 + |
word size | 64 bit (8 octets, 16 nibbles) + |