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From WikiChip
ThunderX2 - Cavium
< cavium
| ThunderX2 | |
| |
| ThunderX2 | |
| Developer | Cavium |
| Manufacturer | TSMC |
| Type | Microprocessors |
| Introduction | May 30, 2016 (announced) May 7, 2018 (launch) |
| ISA | ARMv8 |
| µarch | ThunderX2, Vulcan |
| Word size | 64 bit 8 octets
16 nibbles |
| Process | 14 nm 0.014 μm , 16 nm1.4e-5 mm 0.016 μm
1.6e-5 mm |
| Technology | CMOS |
| Clock | 2,500 MHz-1,600 MHz |
| Succession | |
| ← | |
| ThunderX | |
ThunderX2 is a family of 64-bit multi-core ARM server microprocessors introduced by Cavium in early 2018 succeeding the original ThunderX line.
Facts about "ThunderX2 - Cavium"
| designer | Cavium + |
| first announced | May 30, 2016 + |
| first launched | May 7, 2018 + |
| full page name | cavium/thunderx2 + |
| instance of | microprocessor family + |
| instruction set architecture | ARMv8.1 + |
| main designer | Cavium + |
| manufacturer | TSMC + |
| microarchitecture | ThunderX2 + and Vulcan + |
| name | ThunderX2 + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + and 16 nm (0.016 μm, 1.6e-5 mm) + |
| technology | CMOS + |
| word size | 64 bit (8 octets, 16 nibbles) + |