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Cortex-A520 - Microarchitectures - ARM
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Cortex-A520 µarch
General Info
Arch TypeCPU
DesignerARM Holdings
ManufacturerTSMC
IntroductionQ4 2023
Process4 nm
Core Configs4
Pipeline
TypeIn-order
OoOENo
SpeculativeYes
Reg RenamingNo
Decode3-way
Instructions
ISAARMv9.2-A
ExtensionsFPU, NEON, SVE, SVE2, TrustZone
Cache
L1I Cache32-64 KiB/core
4-way set associative
L1D Cache32-64 KiB/core
4-way set associative
L2 Cache0-512 KiB/cluster
4-way set associative
L3 Cache256 KiB-32 MiB
(optional)
Succession

Cortex-A520 (codename Hayes) is a planned ultra-high efficiency Cortex microarchitecture being designed by ARM Holdings as a successor to the Cortex-A510. Cortex-A520 is scheduled for introduction around the 2023 timeframe.

Process Technology[edit]

The Cortex-A520 was primarily designed to take advantage of TSMC's 4 nm (TSMC N4P).

Key changes from Cortex-A510[edit]

  • Update to ARMv9.2-A [1]
  • Support only 64-bit applications
  • Up to 512 KiB of private L2 cache (from 256 KiB)
  • 8% peak performance improvement over the Cortex-A510 [2]
  • Add QARMA3 Pointer Authentication (PAC) algorithm support

Architecture comparison[edit]

uArch Cortex-A53 Cortex-A55 Cortex-A510 Cortex-A520 Cortex-A530
Codename Apollo Ananke Klein Hayes Nevis
Peak clock speed 2.3 GHz 2.1 GHz 2.0 GHz 2.0 GHz
Architecture ARMv8.0-A ARMv8.2-A ARMv9.0-A ARMv9.2-A
AArch 32-bit and 64-bit 64-bit
L1-I + L1-D 8/64 + 8/64 KiB 16/64 + 16/64 KiB 32/64 + 32/64 KiB
L2 0–256 KiB 0–512 KiB
L3 ? 0–4 MiB 0–16 MiB 0–32 MiB
Decode Width 2 3 3 (2 ALU)
Dispatch 8

Processors[edit]

1× @2.3GHz Kryo Prime (Cortex-A720) +
3× @2.2GHz Kryo Gold (Cortex-A720) +
4× @1.8GHz Kryo Silver (Cortex-A520)
1× 2.8 GHz Kryo Prime (Cortex-X4) +
4× 2.6 GHz Kryo Gold (Cortex-A720) +
3× 1.9 GHz Kryo Silver (Cortex-A520)
1× @2.5GHz Kryo Prime (Cortex-A720) +
3× @2.4GHz Kryo Gold (Cortex-A720) +
4× @1.8GHz Kryo Silver (Cortex-A520)
1× @3.3GHz Kryo Prime (Cortex-X4) +
3× @3.15GHz Kryo Gold (Cortex-A720) +
2× @2.96GHz Kryo Gold (Cortex-A720) +
2× @2.27GHz Kryo Silver (Cortex-A520)
1× @3.05GHz Kryo Prime (Cortex-X4) +
5× @2.96GHz Kryo Gold (Cortex-A720) +
2× @2.04GHz Kryo Silver (Cortex-A520) Q4 2024
1× @3.4GHz Kryo Prime (Cortex-X4) +
3× @3.15GHz Kryo Gold (Cortex-A720) +
2× @2.96GHz Kryo Gold (Cortex-A720) +
2× @2.27GHz Kryo Silver (Cortex-A520)
1× @3.0GHz Kryo Prime (Cortex-X4) +
4× @2.8GHz Kryo Gold (Cortex-A720) +
3× @2.0GHz Kryo Silver (Cortex-A520)

See also[edit]

Reference[edit]

  1. Template:cite web
  2. Template:cite web
codenameCortex-A520 +
core count4 +
designerARM Holdings +
first launchedApril 2023 +
full page namearm holdings/microarchitectures/hayes +
instance ofmicroarchitecture +
instruction set architectureARMv9.2-A +
manufacturerTSMC +
microarchitecture typeCPU +
nameCortex-A520 +
process4 nm (0.004 μm, 4.0e-6 mm) +