• intel/microarchitectures/ice lake (server)
  |cores=8 |cores 2=10
  8 KB (978 words) - 18:41, 26 March 2024
• samsung/exynos/8895
  |frequency=2314 MHz |frequency 2=1690 MHz
  5 KB (713 words) - 07:19, 16 May 2024
• intel/microarchitectures/amber lake
  |cores=2 |extension 20=VT-x
  4 KB (565 words) - 09:03, 24 May 2019
• intel/microarchitectures/comet lake
  |cores=4 |extension 20=VT-x
  10 KB (1,357 words) - 18:48, 13 September 2022
• intel/cores/coffee lake e
  |predecessor link=intel/cores/kaby lake dt |successor link=intel/cores/coffee_lake_er
  5 KB (748 words) - 12:14, 2 June 2019
• amd/packages/socket tr4
  ...;GB/s in each direction.<!--Beck2018, Naffziger2020, EPYC Tech Day 2017-06-20--> {{comp table header|cols|Cores|Threads|L2$|L3$|Base|Turbo|Memory|{{abbr|TDP}}|Launched|Price|{{abbr|OPN}}}}
  86 KB (17,313 words) - 02:48, 13 March 2023
• intel/xeon platinum/8260y
  |frequency=2,400 MHz |turbo frequency1=3,900 MHz
  5 KB (820 words) - 02:38, 29 December 2019
• intel/cores/coffee lake hr
  |predecessor link=intel/cores/coffee lake h |successor link=intel/cores/comet lake h
  4 KB (507 words) - 07:45, 5 May 2019
• intel/cores/broadwell de
  |successor link=intel/cores/hewitt lake * '''TDP:''' 20-65 W
  6 KB (784 words) - 08:28, 10 January 2022
• intel/xeon e5/e5-2670 v3
  |frequency=2,300 MHz |turbo frequency1=3,100 MHz
  4 KB (655 words) - 05:17, 9 April 2022
• intel/cores/coffee lake er
  |predecessor link=intel/cores/coffee_lake_e ...C246). The microprocessor is connected to the chipset via 4 of the chip's 20 PCIe lanes using Intel's proprietary {{intel|Direct Media Interface}} 3.0 (
  5 KB (721 words) - 12:41, 12 June 2023
• amd/packages/fp6
  ...32-bit channels of [[LPDDR4x]] memory, two PCIe Gen 3 I/O interfaces with 20 lanes total, four digital display interfaces, four USB 3.2 Gen 2 ports, fou All FP6 packages carry a monolithic die which integrates eight CPU cores, two memory controllers, a graphics processor, and a controller hub. "Renoi
  20 KB (3,273 words) - 17:47, 10 May 2023
• amd/packages/socket g34
  ...chitecture, and Family 15h featuring up to 8 compute units (not exactly 16 cores) based on the {{amd|Bulldozer|l=arch}} and {{amd|Piledriver|l=arch}} microa ** AMD Turbo CORE technology with per core power gating (Fam. 15h)
  36 KB (7,214 words) - 15:50, 23 April 2022
• amd/epyc/7713p
  |frequency=2,000 MHz |turbo frequency=3,675 MHz
  4 KB (682 words) - 13:35, 18 May 2021
• amd/epyc/7663
  |frequency=2,000 MHz |turbo frequency=3,500 MHz
  4 KB (683 words) - 12:06, 25 May 2021
• amd/epyc/7713
  |frequency=2,000 MHz |turbo frequency=3,675 MHz
  4 KB (683 words) - 12:04, 25 May 2021
• intel/core i7/i7-12700k
  |frequency=3,600 MHz |turbo frequency=4,900 MHz
  6 KB (865 words) - 23:57, 19 March 2023
• intel/core i7/i7-12700kf
  |frequency=3,600 MHz |turbo frequency=4,900 MHz
  4 KB (742 words) - 15:41, 3 November 2021
• intel/core i5/i5-12600k
  |frequency=3,700 MHz |turbo frequency=4,900 MHz
  6 KB (850 words) - 03:53, 21 July 2022
• intel/core i5/i5-12600kf
  |frequency=3,700 MHz |turbo frequency=4,900 MHz
  4 KB (727 words) - 15:41, 3 November 2021

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