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  • | process = 14 nm |l1d desc=6-way set associative
    4 KB (462 words) - 16:15, 13 December 2017
  • | process = 14 nm |l1d desc=6-way set associative
    4 KB (472 words) - 16:15, 13 December 2017
  • |process=14 nm |l1d desc=6-way set associative
    4 KB (475 words) - 17:42, 27 March 2018
  • | process = 14 nm |l1d desc=6-way set associative
    5 KB (573 words) - 16:15, 13 December 2017
  • | process = 14 nm |l1d desc=6-way set associative
    5 KB (572 words) - 16:15, 13 December 2017
  • | process = 14 nm |l1d desc=6-way set associative
    6 KB (744 words) - 18:35, 14 January 2019
  • |process=14 nm |l1d desc=6-way set associative
    5 KB (736 words) - 03:44, 19 August 2023
  • | process = 14 nm |l1d desc=6-way set associative
    5 KB (558 words) - 16:15, 13 December 2017
  • ...lithography process|40 nm process]] (HN) / [[32 nm lithography process|32 nm process]] (FN) in 2010. ...on, {{intel|Fab 32}} in Arizona and {{intel|Fab 28}} in Israel. Intel's 45 nm process is the first time high-k + metal gate transistors was used in high-
    5 KB (602 words) - 05:51, 20 July 2018
  • |process=45 nm |extension 6=SSSE3
    38 KB (5,468 words) - 20:29, 23 May 2019
  • | process = 32 nm | extension 6 = SSSE3
    7 KB (872 words) - 19:42, 30 November 2017
  • | process = 22 nm | extension 6 = SSSE3
    9 KB (1,160 words) - 09:35, 25 September 2019
  • | process = 14 nm | extension 6 = SSSE3
    5 KB (568 words) - 19:40, 30 November 2017
  • |process=14 nm |extension 6=SSSE3
    7 KB (956 words) - 23:05, 23 March 2020
  • | microarch 6 = Haswell | proc = 45 nm
    20 KB (2,661 words) - 00:45, 11 October 2017
  • | microarch 6 = Westmere | proc = 350 nm
    25 KB (3,201 words) - 03:13, 22 September 2018
  • |process=14 nm |tdp=6.5 W
    4 KB (529 words) - 17:41, 27 March 2018
  • |process=14 nm |tdp=6 W
    5 KB (701 words) - 17:40, 27 March 2018
  • |process=14 nm |tdp=6 W
    4 KB (540 words) - 17:40, 27 March 2018
  • |process=14 nm ...d by Intel and introduced in early 2015. The N3000 is manufactured in [[14 nm process]] based on the {{intel|Airmont}} microarchitecture. This chip opera
    4 KB (544 words) - 17:43, 27 March 2018

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