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Zen 5 - Microarchitectures - AMD
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Zen 5 µarch
General Info
Arch TypeCPU
DesignerAMD
ManufacturerTSMC or Samsung
Process3 nm
Core Configs256, 224, 192, 144, 128, 96, 72, 64, 56, 48, 32, 28, 36, 24, 18, 12
PE Configs256, 224, 384, 288, 256, 192, 144, 128, 112, 96, 64, 56, 60, 40, 30, 20
Pipeline
TypeSuperscalar
OoOEYes
SpeculativeYes
Reg RenamingYes
Instructions
ISAx86-64, AVX512, AMX (Advanced Matrix Extensions)
Cores
Core NamesTurin (EPYC server multiprocessor),
Da Vinci (Threadripper Workstation),
Granite Ridge (Gaming Desktop CPU),
Strix Point (Gaming APU with RDNA3 or RDNA4)
Succession

Zen 5 is a planned microarchitecture being developed by AMD as a successor to Zen 4.

History

Zen 5 was first mentioned by lead architect Michael Clark during a discussion on April 9th, 2018[1].

Process Technology

Zen 5 is speculated to be produced on a 3nm process.

Codenames

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Architecture

Nothing is currently known about the architectural improvements that are being done to Zen 5.

Key changes from Zen 4

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Designers

  • David Suggs, chief architect

Bibliography

See Also

codenameZen 5 +
core count256 +, 224 +, 192 +, 144 +, 128 +, 96 +, 72 +, 64 +, 56 +, 48 +, 32 +, 28 +, 36 +, 24 +, 18 + and 12 +
designerAMD +
full page nameamd/microarchitectures/zen 5 +
instance ofmicroarchitecture +
instruction set architecturex86-64 + and AVX512, AMX (Advanced Matrix Extensions) +
manufacturerTSMC or Samsung +
microarchitecture typeCPU +
nameZen 5 +
process3 nm (0.003 μm, 3.0e-6 mm) +
processing element count256 +, 224 +, 384 +, 288 +, 192 +, 144 +, 128 +, 112 +, 96 +, 64 +, 56 +, 60 +, 40 +, 30 + and 20 +