Edit Values
Ryzen 7 4800HS
General Info
Designer	AMD
Manufacturer	TSMC
Model Number	4800HS
Market	Mobile
Introduction	March 16, 2020 (announced) March 16, 2020 (launched)
Shop	Amazon
General Specs
Family	Ryzen 7
Series	4000
Locked	Yes
Frequency	2,900 MHz
Turbo Frequency	4,200 MHz
Clock multiplier	29
Microarchitecture
ISA	x86-64 (x86)
Microarchitecture	Zen 2
Core Name	Renoir
Process	7 nm
Transistors	9,800,000,000
Technology	CMOS
Die	156 mm²
Word Size	64 bit
Cores	8
Threads	16
Max Memory	64 GiB
Multiprocessing
Max SMP	1-Way (Uniprocessor)
Electrical
TDP	35 W
Tcase	0 °C – 105 °C
Packaging
Unknown package "amd,socket_fp6"

Ryzen 7 4800HS is a 64-bit octa-core high-end performance x86 mobile microprocessor introduced by AMD in early 2020. Fabricated on TSMC's 7-nanometer process based on AMD's Zen 2 microarchitecture, the 4800HS operates at a base frequency of 2.9 GHz with a TDP of 35 W and a Boost frequency of up to 4.2 GHz. This APU supports up to 64 GiB of DDR4-3200 or up to 32 GiB of quad-channel LPDDR4x-4266 memory. The 4800HS integrates a Radeon Vega 7 Graphics operating at up to 1.6 GHz.

This processor is identical to the 4800H except for its lower TDP.

Cache

Main article: Zen 2 § Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 512 KiB 524,288 B 0.5 MiB L1I$ 256 KiB 262,144 B 0.25 MiB 8x32 KiB 8-way set associative   L1D$ 256 KiB 262,144 B 0.25 MiB 8x32 KiB 8-way set associative write-back L2$ 4 MiB 4,096 KiB 4,194,304 B 0.00391 GiB     8x512 KiB 8-way set associative write-back L3$ 8 MiB 8,192 KiB 8,388,608 B 0.00781 GiB     2x4 MiB

Memory controller

This SoC features two memory controllers, each supporting DDR4 or LPDDR4x. This chip supports up to 64 GiB of dual-channel DDR4 memory with data rates of up to 3200 MT/s (51.2 GB/s) or up to 32 GiB of quad-channel LPDDR4x with data rates of up to 4266 MT/s (68.27 GB/s).

[Edit/Modify Memory Info]

	Integrated Memory Controller
	Max Type DDR4-3200, LPDDR4x-4266 Max Mem 64 GiB Controllers 2 Channels 4 Max Bandwidth 68.27 GiB/s 69,908.48 MiB/s 73.304 GB/s 73,304.354 MB/s 0.0667 TiB/s 0.0733 TB/s Bandwidth Single 17.88 GiB/s Double 34.13 GB/s Quad 68.27 GB/s