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From WikiChip
Lakefield - Microarchitectures - Intel
< intel | microarchitectures
| Edit Values |
Lakefield is a high-performance low-power 3D microarchitecture designed by Intel and introduced in 2019.
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/microarchitectures/lakefield&oldid=90676"
Facts about "Lakefield - Microarchitectures - Intel"
| codename | Lakefield + |
| core count | 5 + |
| designer | Intel + |
| first launched | 2019 + |
| full page name | intel/microarchitectures/lakefield + |
| instance of | microarchitecture + |
| instruction set architecture | x86-64 + |
| manufacturer | Intel + |
| microarchitecture type | CPU + |
| name | Lakefield + |
| process | 22 nm (0.022 μm, 2.2e-5 mm) + and 10 nm (0.01 μm, 1.0e-5 mm) + |