Semiconductor & Computer Engineering
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FT-2000+/64 - Phytium
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| General Info | |
| Microarchitecture |
FT-2000+/64 is a 64 core ARM server SoC designed by Phytium and introduced in 2019. Fabricated on TSMC's 16 nm process, the chip operates at up 2.3 GHz with a TDP of 96 W. This chip is designed for server, communication, and infrastructure applications.
Facts about "FT-2000+/64 - Phytium"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | FT-2000+/64 - Phytium#io + |
| back image | .png) + |
| core name | FTC-662 + |
| designer | Phytium + |
| die area | 370 mm² (0.574 in², 3.7 cm², 370,000,000 µm²) + |
| family | FT-2000 + |
| first announced | 2019 + |
| first launched | 2019 + |
| full page name | phytium/feiteng/ft-2000+-64 + |
| has ecc memory support | true + |
| instance of | microprocessor + |
| isa | ARMv8.0 + |
| isa family | ARM + |
| l1$ size | 4,096 KiB (4,194,304 B, 4 MiB) + |
| l1d$ size | 2,048 KiB (2,097,152 B, 2 MiB) + |
| l1i$ size | 2,048 KiB (2,097,152 B, 2 MiB) + |
| l2$ size | 32 MiB (32,768 KiB, 33,554,432 B, 0.0313 GiB) + |
| ldate | 2019 + |
| main image | .png) + |
| manufacturer | TSMC + |
| market segment | Server + |
| max memory bandwidth | 143.1 GiB/s (146,534.4 MiB/s, 153.652 GB/s, 153,652.455 MB/s, 0.14 TiB/s, 0.154 TB/s) + |
| max memory channels | 8 + |
| max pcie lanes | 33 + |
| microarchitecture | Mars II + |
| model number | FT-2000+/64 + |
| name | FT-2000+/64 + |
| package | FCBGA-3576 + |
| process | 16 nm (0.016 μm, 1.6e-5 mm) + |
| supported memory type | DDR4-2400 + |
| tdp | 96 W (96,000 mW, 0.129 hp, 0.096 kW) + |
| technology | CMOS + |
| transistor count | 6,000,000,000 + |
| word size | 64 bit (8 octets, 16 nibbles) + |
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