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From WikiChip
Cortex-A8 - Microarchitectures - ARM
| Edit Values | |
| Cortex-A8 µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | ARM Holdings |
| Manufacturer | TSMC |
| Introduction | October 5, 2005 |
| Process | 65 nm, 45 nm |
| Succession | |
Cortex-A8 (codename Tiger) is the successor to the ARM11, a low-power performance ARM microarchitecture designed by ARM Holdings for the mobile market. This microarchitecture is designed as an IP core and is sold to other semiconductor companies to be implemented in their own chips. The Cortex-A8 was designed by the Arm Austin design center.
Retrieved from "https://en.wikichip.org/w/index.php?title=arm_holdings/microarchitectures/cortex-a8&oldid=85393"
Facts about "Cortex-A8 - Microarchitectures - ARM"
| codename | Cortex-A8 + |
| designer | ARM Holdings + |
| first launched | October 5, 2005 + |
| full page name | arm holdings/microarchitectures/cortex-a8 + |
| instance of | microarchitecture + |
| instruction set architecture | ARMv7 + |
| manufacturer | TSMC + |
| microarchitecture type | CPU + |
| name | Cortex-A8 + |
| pipeline stages | 13 + |
| process | 65 nm (0.065 μm, 6.5e-5 mm) + and 45 nm (0.045 μm, 4.5e-5 mm) + |