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EPYC Embedded 3401 - AMD
Edit Values | |
EPYC Embedded 3401 | |
General Info | |
Designer | AMD |
Manufacturer | GlobalFoundries |
Model Number | 3401 |
Market | Server, Embedded |
Introduction | February 21, 2018 (announced) February 21, 2018 (launched) |
Shop | Amazon |
General Specs | |
Family | EPYC Embedded |
Series | 3000 |
Frequency | 1,850 MHz |
Turbo Frequency | 3,000 MHz (1 core), 2,250 MHz (16 cores) |
Clock multiplier | 18.5 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Zen |
Core Name | Snowy Owl |
Process | 14 nm |
Transistors | 9,600,000,000 |
Technology | CMOS |
Die | 213 mm² |
MCP | Yes (2 dies) |
Word Size | 64 bit |
Cores | 16 |
Threads | 16 |
Max Memory | 1 TiB |
Multiprocessing | |
Max SMP | 1-Way (Uniprocessor) |
Electrical | |
TDP | 85 W |
Tjunction | 0 °C – 105 °C |
Packaging | |
Template:packages/amd/package sp4 |
EPYC Embedded 3401 is a 64-bit hexadeca-core x86 embedded microprocessor introduced by AMD in early 2018 for dense servers and edge devices. Fabricated on a 14 nm process based on the Zen microarchitecture, this chip operates at 1.85 GHz with a TDP of 85 W and a turbo frequency of up to 3 GHz. The 3401 supports up to 1 TiB of quad-channel DDR4-2666 memory.
Contents
Cache
- Main article: Zen § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
Integrated Memory Controller
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[Edit] Official AMD Supported Memory Configurations | ||||
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Quad Channel | Single Rank | 1 DIMM per channel | 4 of 8 | DDR4-2666 |
2 DIMMs per channel | 8 of 8 | DDR4-2133 | ||
Dual Rank | 1 DIMM per channel | 4 of 8 | DDR4-2400 | |
2 DIMMs per channel | 8 of 8 | DDR4-1866 |
Expansions
The EPYC Embedded 3401 has 64 PCIe lanes that are MUX'ed with a number of other ports and can be reconfigured as either SATA ports (up to 16 such ports), or as GbE ports (up to 10 such ports), or any mixed configuration of those options.
Expansion Options |
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Networking
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Features
[Edit/Modify Supported Features]
Facts about "EPYC Embedded 3401 - AMD"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | EPYC Embedded 3401 - AMD#pcie + |
base frequency | 1,850 MHz (1.85 GHz, 1,850,000 kHz) + |
clock multiplier | 18.5 + |
core count | 16 + |
core name | Snowy Owl + |
designer | AMD + |
die area | 213 mm² (0.33 in², 2.13 cm², 213,000,000 µm²) + |
die count | 2 + |
family | EPYC Embedded + |
first announced | February 21, 2018 + |
first launched | February 21, 2018 + |
full page name | amd/epyc embedded/3401 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has amd amd-v technology | true + |
has amd amd-vi technology | true + |
has amd secure encrypted virtualization technology | true + |
has amd secure memory encryption technology | true + |
has amd sensemi technology | true + |
has amd transparent secure memory encryption technology | true + |
has ecc memory support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension + and SenseMI Technology + |
has simultaneous multithreading | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
is multi-chip package | true + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 1,536 KiB (1,572,864 B, 1.5 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l1i$ description | 4-way set associative + |
l1i$ size | 1,024 KiB (1,048,576 B, 1 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) + |
l3$ description | 16-way set associative + |
l3$ size | 32 MiB (32,768 KiB, 33,554,432 B, 0.0313 GiB) + |
ldate | February 21, 2018 + |
manufacturer | GlobalFoundries + |
market segment | Server + and Embedded + |
max cpu count | 1 + |
max junction temperature | 378.15 K (105 °C, 221 °F, 680.67 °R) + |
max memory | 1,048,576 MiB (1,073,741,824 KiB, 1,099,511,627,776 B, 1,024 GiB, 1 TiB) + |
max memory bandwidth | 79.47 GiB/s (81,377.28 MiB/s, 85.33 GB/s, 85,330.263 MB/s, 0.0776 TiB/s, 0.0853 TB/s) + |
max memory channels | 4 + |
max sata ports | 16 + |
microarchitecture | Zen + |
min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
model number | 3401 + |
name | EPYC Embedded 3401 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
series | 3000 + |
smp max ways | 1 + |
supported memory type | DDR4-2666 + |
tdp | 85 W (85,000 mW, 0.114 hp, 0.085 kW) + |
technology | CMOS + |
thread count | 16 + |
transistor count | 9,600,000,000 + |
turbo frequency (16 cores) | 2,250 MHz (2.25 GHz, 2,250,000 kHz) + |
turbo frequency (1 core) | 3,000 MHz (3 GHz, 3,000,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |