Semiconductor & Computer Engineering
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ThunderX2 CN9965 - Cavium
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| Microarchitecture |
ThunderX2 CN9965 is a 64-bit icosa-core high-performance ARM server microprocessor introduced by Cavium in mid-2018. The microprocessor, which is based on the Vulcan microarchitecture, is fabricated on TSMC's 16 nm process. Depending on the exact SKU, the CN9965 operates between 1.8 GHz and 2.5 GHz and supports up to quad-/hexa-channel DDR4-2666 memory.
Facts about "ThunderX2 CN9965 - Cavium"
| base frequency | 1,800 MHz (1.8 GHz, 1,800,000 kHz) +, 2,000 MHz (2 GHz, 2,000,000 kHz) +, 2,100 MHz (2.1 GHz, 2,100,000 kHz) + and 2,200 MHz (2.2 GHz, 2,200,000 kHz) + |
| core count | 20 + |
| designer | Cavium + |
| family | ThunderX2 + |
| first announced | May 7, 2018 + |
| first launched | May 7, 2018 + |
| full page name | cavium/thunderx2/cn9965 + |
| instance of | microprocessor + |
| isa | ARMv8.1 + |
| isa family | ARM + |
| l1$ size | 1,280 KiB (1,310,720 B, 1.25 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 640 KiB (655,360 B, 0.625 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 640 KiB (655,360 B, 0.625 MiB) + |
| l2$ description | 8-way set associative + |
| l2$ size | 5 MiB (5,120 KiB, 5,242,880 B, 0.00488 GiB) + |
| l3$ size | 20 MiB (20,480 KiB, 20,971,520 B, 0.0195 GiB) + |
| ldate | May 7, 2018 + |
| manufacturer | TSMC + |
| market segment | Server + |
| max cpu count | 2 + |
| max memory | 2,097,152 MiB (2,147,483,648 KiB, 2,199,023,255,552 B, 2,048 GiB, 2 TiB) + |
| microarchitecture | Vulcan + |
| model number | CN9965 + |
| name | ThunderX2 CN9965 + |
| package | FCLGA-4077 + |
| part number | CN9965-2500LG4077-Y21-G +, CN9965-2400LG4077-Y21-G +, CN9965-2300LG4077-Y21-G +, CN9965-2200LG4077-Y21-G +, CN9965-2100LG4077-Y21-G + and CN9965-2000LG4077-Y21-G + |
| process | 16 nm (0.016 μm, 1.6e-5 mm) + |
| smp max ways | 2 + |
| technology | CMOS + |
| thread count | 40 + |
| word size | 64 bit (8 octets, 16 nibbles) + |