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From WikiChip
Enhanced NetBurst - Microarchitectures - Intel
< intel | microarchitectures
| Edit Values | |
| Enhanced NetBurst µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | Intel |
| Manufacturer | Intel |
| Process | 90 nm, 65 nm |
| Succession | |
Enhanced NetBurst (though no actual name was given by Intel) was a planned microarchitecture designed to succeed NetBurst. On May 7 2004, Intel announced that they have cancelled the microarchitecture.
Codenames
| Codename | Target |
|---|---|
| Tejas | Desktop microprocessors |
| Jayhawk | Server microprocessors |
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/microarchitectures/enhanced_netburst&oldid=56925"
Facts about "Enhanced NetBurst - Microarchitectures - Intel"
| codename | Enhanced NetBurst + |
| designer | Intel + |
| full page name | intel/microarchitectures/enhanced netburst + |
| instance of | microarchitecture + |
| manufacturer | Intel + |
| microarchitecture type | CPU + |
| name | Enhanced NetBurst + |
| process | 90 nm (0.09 μm, 9.0e-5 mm) + and 65 nm (0.065 μm, 6.5e-5 mm) + |