Template:mpu The Mobile Duron 800 based on the Morgan (Camaro) core was a 32-bit x86 microprocessor developed by AMD and introduced in 2001. This model was part of the second generation of the Duron family. Designed based on AMD's K7 on a 180 nm process, this MPU operated at 800 MHz with a bus capable of 200 MT/s. This particular model (the DHM0800AVS1BM) is sometimes labeled by AMD as Athlon but is shipped as Duron due to defective or disabled cache. This chip has a core model of "6" instead of "7" unlike the rest of the Camaro models.

Cache

Main article: K7 § Cache

Cache Info [Edit Values]
L1I$	64 KiB 65,536 B 0.0625 MiB	1x64 KiB 2-way set associative
L1D$	64 KiB 65,536 B 0.0625 MiB	1x64 KiB 2-way set associative
L2$	64 KiB 0.0625 MiB 65,536 B 6.103516e-5 GiB	1x64 KiB 16-way set associative

Graphics

This SoC has no integrated graphics processing unit.

Features

• Halt State
• Sleep State

Documents

DataSheet

• Mobile AMD Duron Processor Model 7 Data Sheet; Publication # 24068; Rev: F; Issue Date: December 2001.

See also

• Duron
• Celeron