From WikiChip
Atom Z612 - Intel
Template:mpu Atom Z612 is an ultra-low power 32-bit x86 system on a chip designed by Intel and introduced in early 2010. The Z612, which is based on the Bonnell microarchitecture (Lincroft core), is fabricated on a 45 nm process. This SoC incorporates a single core operating at 900 MHz with a low frequency mode of 600 MHz and a burst frequency of 1.5 GHz. The chip has a TDP of 1.3 W and supporting up to a 2 GiB of single-channel DDR2-800 memory. Additionally, the Z612 incorporates a GMA 600 IGP operating at 400 MHz.
Facts about "Atom Z612 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Atom Z612 - Intel#package + |
base frequency | 900 MHz (0.9 GHz, 900,000 kHz) + |
bus rate | 400 MT/s (0.4 GT/s, 400,000 kT/s) + |
bus speed | 100 MHz (0.1 GHz, 100,000 kHz) + |
bus type | cDMI + |
chipset | Langwell + |
clock multiplier | 9 + |
core count | 1 + |
core family | 6 + |
core model | 38 + |
core name | Lincroft + |
core stepping | 1 + |
core voltage (max) | 1.2 V (12 dV, 120 cV, 1,200 mV) + |
core voltage (min) | 0.75 V (7.5 dV, 75 cV, 750 mV) + |
cpuid | 20661 + |
designer | Intel + |
die area | 65.253 mm² (0.101 in², 0.653 cm², 65,252,600 µm²) + |
die length | 8.89 mm (0.889 cm, 0.35 in, 8,890 µm) + |
die width | 7.34 mm (0.734 cm, 0.289 in, 7,340 µm) + |
family | Atom + |
first announced | May 4, 2010 + |
first launched | May 4, 2010 + |
full page name | intel/atom/z612 + |
has ecc memory support | false + |
has feature | Hyper-Threading Technology +, Burst Performance Technology + and Enhanced SpeedStep Technology + |
has intel burst performance technology | true + |
has intel enhanced speedstep technology | true + |
has locked clock multiplier | true + |
has simultaneous multithreading | true + |
instance of | microprocessor + |
integrated gpu | PowerVR SGX535 + |
integrated gpu base frequency | 400 MHz (0.4 GHz, 400,000 KHz) + |
integrated gpu designer | Imagination Technologies + |
integrated gpu max memory | 256 MiB (262,144 KiB, 268,435,456 B, 0.25 GiB) + |
isa | x86-32 + |
isa family | x86 + |
l1$ size | 56 KiB (57,344 B, 0.0547 MiB) + |
l1d$ description | 6-way set associative + |
l1d$ size | 24 KiB (24,576 B, 0.0234 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
ldate | May 4, 2010 + |
main image | + |
manufacturer | Intel + |
market segment | Mobile + |
max cpu count | 1 + |
max junction temperature | 363.15 K (90 °C, 194 °F, 653.67 °R) + |
max memory | 2,048 MiB (2,097,152 KiB, 2,147,483,648 B, 2 GiB, 0.00195 TiB) + |
max memory bandwidth | 2.98 GiB/s (3,051.52 MiB/s, 3.2 GB/s, 3,199.751 MB/s, 0.00291 TiB/s, 0.0032 TB/s) + |
max memory channels | 1 + |
max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
microarchitecture | Bonnell + |
min junction temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
min storage temperature | 218.15 K (-55 °C, -67 °F, 392.67 °R) + |
model number | Z612 + |
name | Atom Z612 + |
package | FCBGA-518 + |
part number | AY80609003042AC + |
platform | Moorestown + |
process | 45 nm (0.045 μm, 4.5e-5 mm) + |
s-spec | SLBZN + |
series | Z612 + |
smp max ways | 1 + |
socket | BGA-518 + |
supported memory type | DDR-400 + and DDR2-800 + |
tdp | 1.3 W (1,300 mW, 0.00174 hp, 0.0013 kW) + |
technology | CMOS + |
thread count | 2 + |
transistor count | 140,000,000 + |
turbo frequency (1 core) | 1,500 MHz (1.5 GHz, 1,500,000 kHz) + |
word size | 32 bit (4 octets, 8 nibbles) + |