From WikiChip
Xeon Gold 6246R - Intel
Edit Values | |
Xeon Gold 6246R | |
![]() | |
General Info | |
Designer | Intel |
Manufacturer | Intel |
Model Number | 6246R |
Market | Server |
Introduction | February 24, 2020 (announced) February 24, 2020 (launched) |
Release Price | $3,286.00 (tray) |
Shop | Amazon |
General Specs | |
Family | Xeon Gold |
Series | 6200 |
Locked | Yes |
Frequency | 3,400 MHz |
Turbo Frequency | 4,100 MHz (1 core) |
Bus type | DMI 3.0 |
Bus rate | 4 × 8 GT/s |
Clock multiplier | 34 |
Microarchitecture | |
ISA | x86-64 (x86) |
Microarchitecture | Cascade Lake |
Platform | Purley |
Chipset | Lewisburg |
Core Name | Cascade Lake R |
Core Family | 6 |
Core Model | 85 |
Process | 14 nm |
Technology | CMOS |
Word Size | 64 bit |
Cores | 16 |
Threads | 32 |
Max Memory | 1 TiB |
Multiprocessing | |
Max SMP | 2-Way (Multiprocessor) |
Interconnect | UPI |
Interconnect Links | 2 |
Interconnect Rate | 10.4 GT/s |
Electrical | |
TDP | 205 W |
Tcase | 0 °C – 75 °C |
Packaging | |
Package | FCLGA-3647 (FCLGA) |
Dimension | 76.16 mm × 56.6 mm |
Pitch | 0.8585 mm × 0.9906 mm |
Contacts | 3647 |
Socket | Socket P, LGA-3647 |
Succession | |
Xeon Gold 6246R is a 64-bit 16-core x86 high performance server microprocessor introduced by Intel in early 2020. The Gold 6246R is based on the Cascade Lake microarchitecture and is manufactured on a 14 nm process. This chip supports 2-way multiprocessing, sports 2 AVX-512 FMA units as well as two Ultra Path Interconnect links. This microprocessor supports up 1 TiB of hexa-channel DDR4-2933 memory, operates at 3.4 GHz with a TDP of 205 W and features a turbo boost frequency of up to 4.1 GHz.
Cache
- Main article: Cascade Lake § Cache
The Xeon Gold 6246R features a larger non-default 35.75 MiB of L3, a size that would normally be found on a 26-core part.
![]() |
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
||||||||||||||||||||||||||||||||||||
|
Memory controller
![]() |
Integrated Memory Controller
|
|||||||||||||
|
Facts about "Xeon Gold 6246R - Intel"
base frequency | 3,400 MHz (3.4 GHz, 3,400,000 kHz) + |
bus links | 4 + |
bus rate | 8,000 MT/s (8 GT/s, 8,000,000 kT/s) + |
bus type | DMI 3.0 + |
chipset | Lewisburg + |
clock multiplier | 34 + |
core count | 16 + |
core family | 6 + |
core model | 85 + |
core name | Cascade Lake R + |
designer | Intel + |
family | Xeon Gold + |
first announced | February 24, 2020 + |
first launched | February 24, 2020 + |
full page name | intel/xeon gold/6246r + |
has ecc memory support | true + |
has locked clock multiplier | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 1,024 KiB (1,048,576 B, 1 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 16 MiB (16,384 KiB, 16,777,216 B, 0.0156 GiB) + |
l3$ description | 11-way set associative + |
l3$ size | 35.75 MiB (36,608 KiB, 37,486,592 B, 0.0349 GiB) + |
ldate | February 24, 2020 + |
main image | ![]() |
manufacturer | Intel + |
market segment | Server + |
max case temperature | 348.15 K (75 °C, 167 °F, 626.67 °R) + |
max cpu count | 2 + |
max memory | 1,048,576 MiB (1,073,741,824 KiB, 1,099,511,627,776 B, 1,024 GiB, 1 TiB) + |
max memory bandwidth | 131.13 GiB/s (134,277.12 MiB/s, 140.8 GB/s, 140,799.765 MB/s, 0.128 TiB/s, 0.141 TB/s) + |
max memory channels | 6 + |
microarchitecture | Cascade Lake + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
model number | 6246R + |
name | Xeon Gold 6246R + |
package | FCLGA-3647 + |
platform | Purley + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 3,286.00 (€ 2,957.40, £ 2,661.66, ¥ 339,542.38) + |
release price (tray) | $ 3,286.00 (€ 2,957.40, £ 2,661.66, ¥ 339,542.38) + |
series | 6200 + |
smp interconnect | UPI + |
smp interconnect links | 2 + |
smp interconnect rate | 10.4 GT/s + |
smp max ways | 2 + |
socket | Socket P + and LGA-3647 + |
supported memory type | DDR4-2933 + |
tdp | 205 W (205,000 mW, 0.275 hp, 0.205 kW) + |
technology | CMOS + |
thread count | 32 + |
turbo frequency (1 core) | 4,100 MHz (4.1 GHz, 4,100,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |