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NNP-T 1300 - Intel Nervana
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General Info
Microarchitecture

NNP-T 1300 is a neural processor designed by Intel Nervana and introduced in late 2019. Fabricated on TSMC 16 nm process based on the Spring Crest microarchitecture, the NNP-T 1300 has 22 TPCs along with 55 MiB of scratchpad memory and operates at up to 950 MHz. This chip comes in a PCIe 4.0 accelerator card form factor and incorporates 32 GiB of HBM2 memory. This NPU exposes 16 inter-chip links for scale-out capabilities.

back imageFile:spring crest package (back).png +
base frequency950 MHz (0.95 GHz, 950,000 kHz) +
core count22 +
designerIntel +
die area680 mm² (1.054 in², 6.8 cm², 680,000,000 µm²) +
familyNNP +
first announcedNovember 12, 2019 +
first launchedNovember 12, 2019 +
full page namenervana/nnp/nnp-t 1300 +
has ecc memory supporttrue +
instance ofmicroprocessor +
ldateNovember 12, 2019 +
main imageFile:spring crest package (front).png +
main image captionNPU with 4 HBM2 stacks +
manufacturerTSMC +
market segmentServer +
max memory32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB, 0.0313 TiB) +
max memory bandwidth1,144.409 GiB/s (1,171,875 MiB/s, 1,228.8 GB/s, 1,228,800 MB/s, 1.118 TiB/s, 1.229 TB/s) +
max memory channels32 +
microarchitectureSpring Crest +
model numberNNP-T 1300 +
nameNNP-T 1300 +
packageFCBGA-3325 +
peak flops (half-precision)93,390,000,000,000 FLOPS (93,390,000,000 KFLOPS, 93,390,000 MFLOPS, 93,390 GFLOPS, 93.39 TFLOPS, 0.0934 PFLOPS, 9.339e-5 EFLOPS, 9.339e-8 ZFLOPS) +
power dissipation150 W (150,000 mW, 0.201 hp, 0.15 kW) +
process16 nm (0.016 μm, 1.6e-5 mm) +
seriesNNP-T +
smp interconnectInterChip Link +
smp interconnect links16 +
smp interconnect rate28 GT/s +
supported memory typeHBM2-2400 +
tdp300 W (300,000 mW, 0.402 hp, 0.3 kW) +
technologyCMOS +
transistor count27,000,000,000 +