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From WikiChip
Colossus - Graphcore
Edit Values | |
Colossus µarch | |
General Info | |
Arch Type | NPU |
Designer | Graphcore |
Manufacturer | TSMC |
Introduction | 2018 |
Process | 16 nm |
Colossus is a 16 nm microarchitecture for high-performance neural processors designed by Graphcore set to be introduced in late-2018.
Etymology
Codename Colossus was chosen in honor of Tommy Flowers and the Colossus computer.
Process Technology
Colossus is designed to be fabricated on TSMC's 16 nm FinFET process.
Architecture
This section is empty; you can help add the missing info by editing this page. |
Retrieved from "https://en.wikichip.org/w/index.php?title=graphcore/microarchitectures/colossus&oldid=79347"
Hidden category:
Facts about "Colossus - Graphcore"
codename | Colossus + |
designer | Graphcore + |
first launched | 2018 + |
full page name | graphcore/microarchitectures/colossus + |
instance of | microarchitecture + |
manufacturer | TSMC + |
name | Colossus + |
process | 16 nm (0.016 μm, 1.6e-5 mm) + |