From WikiChip
EPYC Embedded 3201 - AMD
| Edit Values | |
| EPYC Embedded 3201 | |
| General Info | |
| Designer | AMD |
| Manufacturer | GlobalFoundries |
| Model Number | 3201 |
| Market | Server, Embedded |
| Introduction | February 21, 2018 (announced) February 21, 2018 (launched) |
| Shop | Amazon |
| General Specs | |
| Family | EPYC Embedded |
| Series | 3000 |
| Frequency | 1,500 MHz |
| Turbo Frequency | 3,100 MHz (1 core) |
| Clock multiplier | 15 |
| Microarchitecture | |
| ISA | x86-64 (x86) |
| Microarchitecture | Zen |
| Core Name | Snowy Owl |
| Process | 14 nm |
| Transistors | 4,800,000,000 |
| Technology | CMOS |
| Die | 213 mm² |
| Word Size | 64 bit |
| Cores | 8 |
| Threads | 8 |
| Max Memory | 512 GiB |
| Multiprocessing | |
| Max SMP | 1-Way (Uniprocessor) |
| Electrical | |
| TDP | 30 W |
| Tjunction | 0 °C – 95 °C |
| Packaging | |
| Template:packages/amd/package sp4r2 | |
EPYC Embedded 3201 is a 64-bit octa-core x86 embedded microprocessor introduced by AMD in early 2018 for dense servers and edge devices. Fabricated on a 14 nm process based on the Zen microarchitecture, this chip operates at 1.5 GHz with a TDP of 30 W and a turbo frequency of 3.1 GHz. The 3201 supports up to 512 GiB of dual-channel DDR4-2133 ECC memory.
Contents
Cache
- Main article: Zen § Cache
|
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
|||||||||||||||||||||||||||||||||||||
|
|||||||||||||||||||||||||||||||||||||
Memory controller
|
Integrated Memory Controller
|
||||||||||||||
|
||||||||||||||
Expansions
The EPYC Embedded 3201 has 32 PCIe lanes that are MUX'ed with a number of other ports and can be reconfigured as either SATA ports (up to 8 such ports), or as GbE ports (up to 4 such ports), or any mixed configuration of those options.
Expansion Options |
||||||||
|
||||||||
|
Networking
|
||||
|
||||
Features
[Edit/Modify Supported Features]
Facts about "EPYC Embedded 3201 - AMD"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | EPYC Embedded 3201 - AMD#pcie + |
| base frequency | 1,500 MHz (1.5 GHz, 1,500,000 kHz) + |
| clock multiplier | 15 + |
| core count | 8 + |
| core name | Snowy Owl + |
| designer | AMD + |
| die area | 213 mm² (0.33 in², 2.13 cm², 213,000,000 µm²) + |
| family | EPYC Embedded + |
| first announced | February 21, 2018 + |
| first launched | February 21, 2018 + |
| full page name | amd/epyc embedded/3201 + |
| has advanced vector extensions | true + |
| has advanced vector extensions 2 | true + |
| has amd amd-v technology | true + |
| has amd amd-vi technology | true + |
| has amd secure encrypted virtualization technology | true + |
| has amd secure memory encryption technology | true + |
| has amd sensemi technology | true + |
| has amd transparent secure memory encryption technology | true + |
| has ecc memory support | true + |
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension + and SenseMI Technology + |
| has simultaneous multithreading | true + |
| has x86 advanced encryption standard instruction set extension | true + |
| instance of | microprocessor + |
| isa | x86-64 + |
| isa family | x86 + |
| l1$ size | 768 KiB (786,432 B, 0.75 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 256 KiB (262,144 B, 0.25 MiB) + |
| l1i$ description | 4-way set associative + |
| l1i$ size | 512 KiB (524,288 B, 0.5 MiB) + |
| l2$ description | 8-way set associative + |
| l2$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
| l3$ description | 16-way set associative + |
| l3$ size | 16 MiB (16,384 KiB, 16,777,216 B, 0.0156 GiB) + |
| ldate | February 21, 2018 + |
| manufacturer | GlobalFoundries + |
| market segment | Server + and Embedded + |
| max cpu count | 1 + |
| max junction temperature | 368.15 K (95 °C, 203 °F, 662.67 °R) + |
| max memory | 524,288 MiB (536,870,912 KiB, 549,755,813,888 B, 512 GiB, 0.5 TiB) + |
| max memory bandwidth | 31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) + |
| max memory channels | 2 + |
| max sata ports | 8 + |
| microarchitecture | Zen + |
| min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
| model number | 3201 + |
| name | EPYC Embedded 3201 + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |
| series | 3000 + |
| smp max ways | 1 + |
| supported memory type | DDR4-2133 + |
| tdp | 30 W (30,000 mW, 0.0402 hp, 0.03 kW) + |
| technology | CMOS + |
| thread count | 8 + |
| transistor count | 4,800,000,000 + |
| turbo frequency (1 core) | 3,100 MHz (3.1 GHz, 3,100,000 kHz) + |
| word size | 64 bit (8 octets, 16 nibbles) + |