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EPYC Embedded 3151 - AMD
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EPYC Embedded 3151
General Info
DesignerAMD
ManufacturerGlobalFoundries
Model Number3151
MarketServer, Embedded
IntroductionFebruary 21, 2018 (announced)
February 21, 2018 (launched)
ShopAmazon
General Specs
FamilyEPYC Embedded
Series3000
Frequency2,700 MHz
Turbo Frequency2,900 MHz (1 core)
Clock multiplier27
Microarchitecture
ISAx86-64 (x86)
MicroarchitectureZen
Core NameSnowy Owl
Process14 nm
Transistors4,800,000,000
TechnologyCMOS
Die213 mm²
Word Size64 bit
Cores4
Threads8
Max Memory512 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
TDP45 W
Tjunction0 °C – 95 °C
Packaging
Template:packages/amd/package sp4r2

EPYC Embedded 3151 is a 64-bit quad-core x86 embedded microprocessor introduced by AMD in early 2018 for dense servers and edge devices. Fabricated on a 14 nm process based on the Zen microarchitecture, this chip operates at 2.7 GHz with a TDP of 45 W and a turbo frequency of 2.9 GHz. The 3151 supports up to 512 GiB of dual-channel DDR4-2666 ECC memory.


DIL16 Blank.svg Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.


Cache

Main article: Zen § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$384 KiB
393,216 B
0.375 MiB
L1I$256 KiB
262,144 B
0.25 MiB
4x64 KiB4-way set associative 
L1D$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associativewrite-back
L2$2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
  4x512 KiB8-way set associativewrite-back
L3$16 MiB
16,384 KiB
16,777,216 B
0.0156 GiB
  2x8 MiB16-way set associativewrite-back
Retrieved from "https://en.wikichip.org/w/index.php?title=amd/epyc_embedded/3151&oldid=74333"
Facts about "EPYC Embedded 3151 - AMD"
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base frequency2,700 MHz (2.7 GHz, 2,700,000 kHz) +
clock multiplier27 +
core count4 +
core nameSnowy Owl +
designerAMD +
die area213 mm² (0.33 in², 2.13 cm², 213,000,000 µm²) +
familyEPYC Embedded +
first announcedFebruary 21, 2018 +
first launchedFebruary 21, 2018 +
full page nameamd/epyc embedded/3151 +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size384 KiB (393,216 B, 0.375 MiB) +
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description4-way set associative +
l1i$ size256 KiB (262,144 B, 0.25 MiB) +
l2$ description8-way set associative +
l2$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
l3$ description16-way set associative +
l3$ size16 MiB (16,384 KiB, 16,777,216 B, 0.0156 GiB) +
ldateFebruary 21, 2018 +
manufacturerGlobalFoundries +
market segmentServer + and Embedded +
max cpu count1 +
max junction temperature368.15 K (95 °C, 203 °F, 662.67 °R) +
max memory524,288 MiB (536,870,912 KiB, 549,755,813,888 B, 512 GiB, 0.5 TiB) +
microarchitectureZen +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
model number3151 +
nameEPYC Embedded 3151 +
process14 nm (0.014 μm, 1.4e-5 mm) +
series3000 +
smp max ways1 +
tdp45 W (45,000 mW, 0.0603 hp, 0.045 kW) +
technologyCMOS +
thread count8 +
transistor count4,800,000,000 +
turbo frequency (1 core)2,900 MHz (2.9 GHz, 2,900,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +