Semiconductor & Computer Engineering
-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Joshua - Microarchitectures - Cyrix
< cyrix
| Edit Values | |
| Joshua µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | Cyrix |
| Manufacturer | Texas Instruments |
| Process | 0.180 µm |
| Core Configs | 1 |
| Pipeline | |
| Stages | 7 |
| Instructions | |
| ISA | x86-32 |
| Succession | |
Joshua (formerly Gobi) was a 32-bit x86 microarchitecture designed by Cyrix for the low-end PC market. Joshua succeeded Cayenne.
Retrieved from "https://en.wikichip.org/w/index.php?title=cyrix/microarchitectures/joshua&oldid=72498"
Facts about "Joshua - Microarchitectures - Cyrix"
| codename | Joshua + |
| core count | 1 + |
| designer | Cyrix + |
| full page name | cyrix/microarchitectures/joshua + |
| instance of | microarchitecture + |
| instruction set architecture | x86-32 + |
| manufacturer | Texas Instruments + |
| microarchitecture type | CPU + |
| name | Joshua + |
| pipeline stages | 7 + |
| process | 180 nm (0.18 μm, 1.8e-4 mm) + |