Core i9-7960X - Intel

	Edit Values
	Core i9-7960X
	General Info
Designer	Intel
Manufacturer	Intel
Model Number	i9-7960X
Part Number	CD8067303734802
S-Spec	SR3RR
Market	Desktop
Introduction	May 30, 2017 (announced); September 25, 2017 (launched)
Release Price	$1,699
Shop	Amazon
	General Specs
Family	Core i9
Series	i9-7900
Locked	No
Frequency	2,800 MHz
Turbo Frequency	4,200 MHz (1 core),; 4,200 MHz (2 cores)
Bus type	DMI 3.0
Bus rate	4 × 8 GT/s
	Microarchitecture
ISA	x86-64 (x86)
Microarchitecture	Skylake (server)
Platform	Skylake
Chipset	Lewisburg
Core Name	Skylake X
Core Family	6
Core Model	85
Core Stepping	M0
Process	14 nm
Technology	CMOS
Word Size	64 bit
Cores	16
Threads	32
Max Memory	128 GiB
	Multiprocessing
Max SMP	1-Way (Uniprocessor)
	Electrical
TDP	165 W
Tstorage	-25 °C – 125 °C
	Packaging
	Template:packages/intel/lga-2066

Core i9-7960X is a 64-bit hexadeca-core high-performance x86 desktop microprocessor introduced by Intel in mid-2017. This chip, which is based on the Skylake microarchitecture, is fabricated on Intel's enhanced 14nm+ process. The i7-7960X operates at 2.8 GHz with a TDP of 165 W and a Turbo Boost frequency of 4.2 GHz. The processor supports up to 128 GiB of quad-channel DDR4-2666 memory.

In addition to its Turbo Boost frequency, the i9-7960X has a Turbo Max frequency of 4.4 GHz.

Cache

Main article: Skylake § Cache

[Edit/Modify Cache Info]

Cache Organization

Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.

L1$

1 MiB

1,024 KiB
1,048,576 B

L1I$	512 KiB 524,288 B 0.5 MiB	16x32 KiB	8-way set associative
L1D$	512 KiB 524,288 B 0.5 MiB	16x32 KiB	8-way set associative	write-back

L2$

16 MiB

16,384 KiB
16,777,216 B
0.0156 GiB

		16x1 MiB	16-way set associative	write-back

L3$

22 MiB

22,528 KiB
23,068,672 B
0.0215 GiB

		16x1.375 MiB	16-way set associative	write-back

Memory controller

[Edit/Modify Memory Info]

Integrated Memory Controller

Max Type	DDR4-2666
Supports ECC	No
Channels	4
Max Bandwidth	79.47 GiB/s 81,377.28 MiB/s 85.33 GB/s 85,330.263 MB/s 0.0776 TiB/s 0.0853 TB/s
Bandwidth	Single 19.89 GiB/s Double 39.72 GiB/s Quad 79.47 GiB/s

Expansions

[Edit/Modify Expansions Info]

Expansion Options

PCIe	Revision: 3.0
	Max Lanes: 44
	Configuration: x16, x8, x4

Graphics

This processor has no integrated graphics.

Features

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX	MMX Extension
EMMX	Extended MMX Extension
SSE	Streaming SIMD Extensions
SSE2	Streaming SIMD Extensions 2
SSE3	Streaming SIMD Extensions 3
SSSE3	Supplemental SSE3
SSE4.1	Streaming SIMD Extensions 4.1
SSE4.2	Streaming SIMD Extensions 4.2
AVX	Advanced Vector Extensions
AVX2	Advanced Vector Extensions 2
AVX-512	Advanced Vector 512-bit (2 Units)
AVX512F	AVX-512 Foundation
AVX512CD	AVX-512 Conflict Detection
AVX512BW	AVX-512 Byte and Word
AVX512DQ	AVX-512 Doubleword and Quadword Instructions
AVX512VL	AVX-512 Vector Length
ABM	Advanced Bit Manipulation
BMI1	Bit Manipulation Instruction Set 1
BMI2	Bit Manipulation Instruction Set 2
FMA3	3-Operand Fused-Multiply-Add
AES	AES Encryption Instructions
RdRand	Hardware RNG
ADX	Multi-Precision Add-Carry
CLMUL	Carry-less Multiplication Extension
F16C	16-bit Floating Point Conversion

x86-16	16-bit x86
x86-32	32-bit x86
x86-64	64-bit x86
Real	Real Mode
Protected	Protected Mode
SMM	System Management Mode
FPU	Integrated x87 FPU
NX	No-eXecute
HT	Hyper-Threading
TBT 2.0	Turbo Boost Technology 2.0
TBMT 3.0	Turbo Boost Max Technology 3.0
EIST	Enhanced SpeedStep Technology
VT-x	VT-x (Virtualization)
VT-d	VT-d (I/O MMU virtualization)
EPT	Extended Page Tables (SLAT)
TSX	Transactional Synchronization Extensions

Frequencies

See also: Intel's CPU Frequency Behavior

[Modify Frequency Info]

Mode	Base	Turbo Frequency/Active Cores
Mode	Base	1	2	3	4	5	6	7	8	9	10	11	12	13	14	15	16
Normal	2,800 MHz	4,200 MHz	4,200 MHz	4,000 MHz	4,000 MHz	3,900 MHz	3,900 MHz	3,900 MHz	3,900 MHz	3,900 MHz	3,900 MHz	3,900 MHz	3,900 MHz	3,600 MHz	3,600 MHz	3,600 MHz	3,600 MHz

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Core i9-7960X - Intel#pcie +
base frequency	2,800 MHz (2.8 GHz, 2,800,000 kHz) +
bus links	4 +
bus rate	8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus type	DMI 3.0 +
chipset	Lewisburg +
core count	16 +
core family	6 +
core model	85 +
core name	Skylake X +
core stepping	M0 +
designer	Intel +
family	Core i9 +
first announced	May 30, 2017 +
first launched	September 25, 2017 +
full page name	intel/core i9/i9-7960x +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has advanced vector extensions 512	true +
has ecc memory support	false +
has extended page tables support	true +
has feature	Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Turbo Boost Max Technology 3.0 +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables + and Transactional Synchronization Extensions +
has intel enhanced speedstep technology	true +
has intel turbo boost max technology 3 0	true +
has intel turbo boost technology 2 0	true +
has intel vt-d technology	true +
has intel vt-x technology	true +
has locked clock multiplier	false +
has second level address translation support	true +
has simultaneous multithreading	true +
has transactional synchronization extensions	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
isa	x86-64 +
isa family	x86 +
l1$ size	1,024 KiB (1,048,576 B, 1 MiB) +
l1d$ description	8-way set associative +
l1d$ size	512 KiB (524,288 B, 0.5 MiB) +
l1i$ description	8-way set associative +
l1i$ size	512 KiB (524,288 B, 0.5 MiB) +
l2$ description	16-way set associative +
l2$ size	16 MiB (16,384 KiB, 16,777,216 B, 0.0156 GiB) +
l3$ description	16-way set associative +
l3$ size	22 MiB (22,528 KiB, 23,068,672 B, 0.0215 GiB) +
ldate	September 25, 2017 +
main image	+
manufacturer	Intel +
market segment	Desktop +
max cpu count	1 +
max memory	131,072 MiB (134,217,728 KiB, 137,438,953,472 B, 128 GiB, 0.125 TiB) +
max memory bandwidth	79.47 GiB/s (81,377.28 MiB/s, 85.33 GB/s, 85,330.263 MB/s, 0.0776 TiB/s, 0.0853 TB/s) +
max memory channels	4 +
max storage temperature	398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitecture	Skylake (server) +
min storage temperature	248.15 K (-25 °C, -13 °F, 446.67 °R) +
model number	i9-7960X +
name	Core i9-7960X +
number of avx-512 execution units	2 +
part number	CD8067303734802 +
platform	Skylake +
process	14 nm (0.014 μm, 1.4e-5 mm) +
release price	$ 1,699.00 (€ 1,529.10, £ 1,376.19, ¥ 175,557.67) +
s-spec	SR3RR +
series	i9-7900 +
smp max ways	1 +
supported memory type	DDR4-2666 +
tdp	165 W (165,000 mW, 0.221 hp, 0.165 kW) +
technology	CMOS +
thread count	32 +
turbo frequency (1 core)	4,200 MHz (4.2 GHz, 4,200,000 kHz) +
turbo frequency (2 cores)	4,200 MHz (4.2 GHz, 4,200,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +

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