Semiconductor & Computer Engineering
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R-Car H1 - Renesas
Template:mpu R-Car H1 is a high-end embedded penta-core SoC for the automotive industry designed by Renesas and introduced in 2011. While mass production was scheduled to begin in December 2012, it's unknown if that stage was ever actually reached. The H1 features 5 cores, four Cortex-A9 cores operating at 1 GHz and an additional SH-4A core operating at 800 MHz intended for real-time processing multimedia engine (MME). This chips incorporates Imagination's PowerVR SGX543-MP2 GPU. The H1 supports up to 2 GiB of DDR3-1066 memory.
Facts about "R-Car H1 - Renesas"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | R-Car H1 - Renesas#package + and R-Car H1 - Renesas#io + |
| base frequency | 800 MHz (0.8 GHz, 800,000 kHz) + and 1,000 MHz (1 GHz, 1,000,000 kHz) + |
| core count | 5 + |
| core name | Cortex-A9 + and SH-4A + |
| core voltage | 1.2 V (12 dV, 120 cV, 1,200 mV) + |
| designer | Renesas + and ARM Holdings + |
| family | R-Car + |
| first announced | October 21, 2011 + |
| first launched | November 2011 + |
| full page name | renesas/r-car/h1 + |
| has ecc memory support | false + |
| instance of | microprocessor + |
| integrated gpu | PowerVR SGX543 + |
| integrated gpu base frequency | 250 MHz (0.25 GHz, 250,000 KHz) + |
| integrated gpu designer | Imagination Technologies + |
| integrated gpu execution units | 2 + |
| io voltage | 3.3 V (33 dV, 330 cV, 3,300 mV) + |
| isa | ARMv7 + |
| isa family | ARM + |
| l1$ size | 256 KiB (262,144 B, 0.25 MiB) + |
| l1d$ description | 4-way set associative + |
| l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l1i$ description | 4-way set associative + |
| l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |
| ldate | November 2011 + |
| main image |  + |
| manufacturer | TSMC + |
| market segment | Embedded + |
| max cpu count | 1 + |
| max memory | 2,048 MiB (2,097,152 KiB, 2,147,483,648 B, 2 GiB, 0.00195 TiB) + |
| max memory bandwidth | 7.95 GiB/s (8,140.8 MiB/s, 8.536 GB/s, 8,536.248 MB/s, 0.00776 TiB/s, 0.00854 TB/s) + |
| max memory channels | 2 + |
| max pcie lanes | 1 + |
| microarchitecture | Cortex-A9 + and SH-4A + |
| model number | H1 + |
| name | R-Car H1 + |
| package | FCBGA-832 + |
| part number | R8A77790 + |
| process | 40 nm (0.04 μm, 4.0e-5 mm) + |
| series | 1st Gen + |
| smp max ways | 1 + |
| supported memory type | DDR3-1066 + |
| technology | CMOS + |
| thread count | 5 + |
| word size | 32 bit (4 octets, 8 nibbles) + |
