Semiconductor & Computer Engineering
-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Tolapai - Cores - Intel
< intel
| Edit Values | |
| Tolapai | |
 | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Introduction | August 30, 2007 (announced) |
| Microarchitecture | |
| ISA | x86-32 |
| Microarchitecture | Pentium M |
| Word Size | 4 octets 32 bit8 nibbles |
| Process | 90 nm 0.09 μm 9.0e-5 mm |
| Technology | CMOS |
| Clock | 600 MHz - 1,200 MHz |
Tolapai is the core for Intel's EP80579 system on a chips based on the Pentium M microarchitecture.
Overview
 |
This section is empty; you can help add the missing info by editing this page. |
Common Features
| |
This section is empty; you can help add the missing info by editing this page. |
Members
| |
This section is empty; you can help add the missing info by editing this page. |
Die Shot
- 90 nm process
- 148,000,000 transistors
Documents
Hidden category:
Facts about "Tolapai - Cores - Intel"
| designer | Intel + |
| first announced | August 30, 2007 + |
| instance of | core + |
| isa | x86-32 + |
| manufacturer | Intel + |
| microarchitecture | Pentium M + |
| name | Tolapai + |
| process | 90 nm (0.09 μm, 9.0e-5 mm) + |
| technology | CMOS + |
| word size | 32 bit (4 octets, 8 nibbles) + |